data speculation
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2019 ◽  
Author(s):  
Anil Kumar Bheemaiah

A new algorithm of data dependencies and ILP is defined with the sense index of a thread in true-parallelism(™), from the definitions of Quasi-Parallelism, which is the sensitivity and sense indices defined for true scalability between single/multi-cores. The application to the CUDA architecture is delineated in formal architectural definitions. Keywords: CUDA architectures, superscalar, ILP, data prediction, sense sensitivity index. What:Out of order processing in a pipeline, can be optimized with the sense-boarding processor. In this single to multi-core scalable architecture, the processor is thread-centric with sleeping and active threads. Sleeping threads have a sense() function associated with them. Unlike their human counterparts, snoring is a useful feature that helps keep sensitive threads awake and running. sense-boarding is a scheduling algorithm that tracks the sensitivity indices of threads to snoring and helps schedule threads with dependency relationships for out of order execution.How:sense boarding is a board based dependency for instruction-level parallelism in multi-thread vector processing in out of order single-core/multicore symmetries.Inter thread dependencies of data are marked in a board data-structure by maps to define sensitivity and sense indices, sense functionality is useful in the case of dependencies, resource waiting and speculative execution or in data generation and prediction. sense determines the relationship in instruction-level parallelism, to sensitive out of order and data speculation. The application to the CUDA architecture for stream processing in GPUs is also mentioned.Algorithms are:Instruction level parallelism in sense-sensitivity index metrics:Data speculation , dirty caches, parallel pipeline algorithms.Scalability in single core/ multi core implementations.CUDA multi core architectures for stream speculation and instruction level parallelism.Why: Sleep is rest, and sense a measure of thread parallel-ness. While threads sleep for the right time, the awake ones perform in quasi-parallelism as HPC. Asynchronous with Lamport clocks.


2017 ◽  
Vol 8 (1) ◽  
pp. 3-7
Author(s):  
Mick Finch ◽  
Martin Westwood
Keyword(s):  

2011 ◽  
pp. 2040-2040
Author(s):  
Yves Robert ◽  
Sameer Shende ◽  
Allen D. Malony ◽  
Alan Morris ◽  
Wyatt Spear ◽  
...  
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Author(s):  
James Smith ◽  
Antonio Gonzalez ◽  
Pedro Marcuello ◽  
Yiannakis Sazeides
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Author(s):  
Enric Morancho ◽  
José María Llabería ◽  
Àngel Olivé
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