readout error
Recently Published Documents


TOTAL DOCUMENTS

5
(FIVE YEARS 3)

H-INDEX

0
(FIVE YEARS 0)

2021 ◽  
Vol 7 (47) ◽  
Author(s):  
Alistair W. R. Smith ◽  
Kiran E. Khosla ◽  
Chris N. Self ◽  
M. S. Kim

2021 ◽  
Vol 16 (2) ◽  
Author(s):  
Peng Duan ◽  
Zi-Feng Chen ◽  
Qi Zhou ◽  
Wei-Cheng Kong ◽  
Hai-Feng Zhang ◽  
...  
Keyword(s):  

2020 ◽  
Vol 2 (2) ◽  
pp. 121
Author(s):  
Endro Wahjono ◽  
Mochammad Machmud Rifadil ◽  
Ony Asrarul Qudsi ◽  
Muhammad Nur Sururi

This research discusses about design and implementation of the power meters which are equipped with over or under voltage relays at 1 phase load based on internet of things (IoT). The power meters use power sensors that can detect active power values (P), apparent power (S), voltage (V), current (I), power factor (PF), frequency, energy, and total harmonic distortion (THD). Data on the power meter will be sent and stored in the database. Data on the power meters can also be monitored remotely via smartphones and personal computers using internet media. The power meters are equipped with indicators for over voltage, normal and under voltage conditions. This power meter is also equipped with a relay to disconnect the power at the load when there is interference with over voltage or under voltage on the system. From the results of tests that have been carried out, the relay will cut the load when there is interference with over voltage or under voltage on the system. Based on the results of testing that has been done, the design of the power meter made in this research had an average error of 0.0562% for resistive load and has the largest data readout error is 9.255% for non-linear load.


2008 ◽  
Vol 8 (3&4) ◽  
pp. 330-344
Author(s):  
A.M. Stephens ◽  
A.G. Fowler ◽  
L.C.L. Hollenberg

Assuming an array that consists of two parallel lines of qubits and that permits only nearest neighbor interactions, we construct physical and logical circuitry to enable universal fault tolerant quantum computation under the $[[7,1,3]]$ quantum code. A rigorous lower bound to the fault tolerant threshold for this array is determined in a number of physical settings. Adversarial memory errors, two-qubit gate errors and readout errors are included in our analysis. In the setting where the physical memory failure rate is equal to one-tenth of the physical gate error rate, the physical readout error rate is equal to the physical gate error rate, and the duration of physical readout is ten times the duration of a physical gate, we obtain a lower bound to the asymptotic threshold of $1.96\times10^{-6}$.


Sign in / Sign up

Export Citation Format

Share Document