IFIP International Federation for Information Processing - VLSI-SOC: From Systems to Chips
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scholarly journals A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits

2006 ◽  
pp. 197-211 ◽  
Author(s):  
Cristiano Lazzari ◽  
Cristiano Domingues ◽  
José Güntzel ◽  
Ricardo Reis
Keyword(s):  
Cmos Circuits ◽  
Automatic Layout ◽  
Layout Generation

scholarly journals Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs

2006 ◽  
pp. 39-54 ◽  
Author(s):  
Thomas Hollstein ◽  
Ralf Ludewig ◽  
Heiko Zimmer ◽  
Christoph Mager ◽  
Simon Hohenstern ◽  
...  
Keyword(s):  
Testing And Debugging ◽  
On Chip

scholarly journals Effect of Power Optimizations on Soft Error Rate

2006 ◽  
pp. 1-20 ◽  
Author(s):  
Vijay Degalahal ◽  
R. Ramanarayanan ◽  
Narayanan Vijaykrishnan ◽  
Y. Xie ◽  
M. J. Irwin
Keyword(s):  
Error Rate ◽  
Soft Error ◽  
Soft Error Rate

scholarly journals Automated Conversion of SystemC Fixed-Point Data Types

2006 ◽  
pp. 55-72 ◽  
Author(s):  
Axel G. Braun ◽  
Djones V. Lettnin ◽  
Joachim Gerlach ◽  
Wolfgang Rosenstiel
Keyword(s):  
Fixed Point ◽  
Data Types ◽  
Point Data

scholarly journals A Switched Opamp Based 10 Bits Integrated ADC for Ultra Low Power Applications

2006 ◽  
pp. 133-147
Author(s):  
Giuseppe Bonfini ◽  
Andrea S. Brogna ◽  
Roberto Saletti ◽  
Cristian Garbossa ◽  
Luca Colombini ◽  
...  
Keyword(s):  
Low Power ◽  
Ultra Low Power

scholarly journals Optimizing SOC Test Resources Using Dual Sequences

2006 ◽  
pp. 181-196
Author(s):  
Wei Zou ◽  
Chris C. N. Chu ◽  
Sudhakar M. Reddy ◽  
Irith Pomeranz
Keyword(s):  
Soc Test ◽  
Dual Sequences

scholarly journals Validation of Asynchronous Circuit Specifications Using IF/CADP

2006 ◽  
pp. 85-100 ◽  
Author(s):  
Dominique Borrione ◽  
Menouer Boubekeur ◽  
Laurent Mounier ◽  
Marc Renaudin ◽  
Antoine Siriani
Keyword(s):  
Asynchronous Circuit
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