Proceedings First Asian Test Symposium (ATS `92)
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43

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Published By IEEE Comput. Soc. Press

0818629851

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Test input vectors for supply current testing of TTL combinational circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224436 ◽

2003 ◽

Author(s):

M. Hashizume ◽

T. Tamesada ◽

I. Tsukimoto

Keyword(s):

Combinational Circuits ◽

Current Testing ◽

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Path delay fault simulation algorithms for sequential circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224444 ◽

2003 ◽

Author(s):

T.J. Chakraborty ◽

V.D. Agrawal ◽

M.L. Bushnell

Keyword(s):

Fault Simulation ◽

Sequential Circuits ◽

Delay Fault ◽

Path Delay Fault ◽

Simulation Algorithms

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Methods to measure and to enhance the testability of behavioral descriptions of digital circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224448 ◽

2003 ◽

Author(s):

J.-F. Santucci ◽

G. Dray ◽

M. Boumedine ◽

N. Giambiasi

Keyword(s):

Digital Circuits

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Laser injection of spot defects on integrated circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224415 ◽

2003 ◽

Author(s):

R. Velazco ◽

B. Martinet ◽

G. Auvert

Keyword(s):

Integrated Circuits

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A complement-based fast algorithm to generate universal test sets for combinational function blocks

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224439 ◽

2003 ◽

Author(s):

Beyin Chen ◽

Chung Len Lee

Keyword(s):

Fast Algorithm ◽

Universal Test ◽

Function Blocks ◽

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Accelerated fault simulation utilizing multiple-fault propagation

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224432 ◽

2003 ◽

Author(s):

Y. Xing ◽

G. van Brakel ◽

H.G. Kerkhoff

Keyword(s):

Fault Simulation ◽

Fault Propagation ◽

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Test set compaction for combinational circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224429 ◽

2003 ◽

Author(s):

Jau-Shien Chang ◽

Chen-Shang Lin

Keyword(s):

Combinational Circuits ◽

Test Set ◽

Test Set Compaction

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A method of diagnosing logical faults in combinational circuits

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224413 ◽

2003 ◽

Author(s):

K. Yamazaki ◽

T. Yamada

Keyword(s):

Combinational Circuits

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Formal verification of fail-safeness of a comparator for redundant system using regular temporal logic

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224426 ◽

2003 ◽

Author(s):

K. Kawakubo ◽

H. Hiraishi

Keyword(s):

Formal Verification ◽

Temporal Logic ◽

Redundant System

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Issues in fault modelling and testing of micropipelines

Proceedings First Asian Test Symposium (ATS `92) ◽

10.1109/ats.1992.224446 ◽

2003 ◽

Author(s):

S. Pagey ◽

S.D. Sherlekar ◽

G. Venkatesh

Keyword(s):

Fault Modelling

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