2011 IEEE International Integrated Reliability Workshop Final Report
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9781457701153, 9781457701139, 9781457703102
Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

On-chip circuit for massively parallel BTI characterization

2011 ◽  
Author(s):  
M. B. da Silva ◽  
B. Kaczer ◽  
G. Van der Plas ◽  
G. I. Wirth ◽  
G. Groeseneken
Keyword(s):  
Massively Parallel ◽  
On Chip

User verify and disturb mechanisms in a 65nm flash FPGA

2011 ◽  
Author(s):  
James Yingbo Jia ◽  
Pavan Singaraju ◽  
Fethi Dhaoui ◽  
Rich Newell ◽  
Patty Liu ◽  
...  

When does a circuit really fail?

2011 ◽  
Author(s):  
J. T. Ryan ◽  
L. Wei ◽  
J. P. Campbell ◽  
R. G. Southwick ◽  
K. P. Cheung ◽  
...  

Cryogenic to room temperature effects of NBTI in high-k PMOS devices

2011 ◽  
Author(s):  
Richard G. Southwick ◽  
Shem T. Purnell ◽  
Blake A. Rapp ◽  
Ryan J. Thompson ◽  
Shane K. Pugmire ◽  
...  
Keyword(s):  
Temperature Effects ◽  
Room Temperature ◽  
High K

Hot-carrier and recovery effect on p-channel lateral DMOS

2011 ◽  
Author(s):  
S. Aresu ◽  
R.-P. Vollertsen ◽  
R. Rudolf ◽  
C. Schlunder ◽  
H. Reisinger ◽  
...  
Keyword(s):  
Recovery Effect ◽  
Hot Carrier
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