Proceedings. Fifth Great Lakes Symposium on VLSI
Latest Publications

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Published By IEEE Comput. Soc. Press

0818670355

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A universal formalization of the effects of threshold voltages for discrete switch-level circuit models

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516065 ◽

2002 ◽

Author(s):

W.H.F.J. Korver

Keyword(s):

Threshold Voltages

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Improving self-timed pipeline ring performance through the addition of buffer loops

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516056 ◽

2002 ◽

Cited By ~ 1

Author(s):

Hai Zhao ◽

N.M. Sabine ◽

Edwin Hsing-Mean Sha

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Scan testing of asynchronous sequential circuits

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516057 ◽

2002 ◽

Cited By ~ 12

Author(s):

O.A. Petlin ◽

S.B. Furber

Keyword(s):

Sequential Circuits ◽

Scan Testing

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A scalable shared buffer ATM switch architecture

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516063 ◽

2002 ◽

Cited By ~ 2

Author(s):

A. Agrawal ◽

A. Raju ◽

S. Varadarajan ◽

M.A. Bayoumi

Keyword(s):

Atm Switch ◽

Switch Architecture ◽

Shared Buffer

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Automated verification of temporal properties specified as state machines in VHDL

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516033 ◽

2002 ◽

Cited By ~ 3

Author(s):

Y.V. Hoskote ◽

J.A. Abraham ◽

D.S. Fussell

Keyword(s):

Automated Verification ◽

State Machines ◽

Temporal Properties

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A personal computer based VLSI design curriculum

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516062 ◽

2002 ◽

Cited By ~ 1

Author(s):

W.B. Leigh

Keyword(s):

Personal Computer ◽

Vlsi Design ◽

Computer Based

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Specification and synthesis of bounded indirection

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516030 ◽

2002 ◽

Cited By ~ 1

Author(s):

M.E. Tuna ◽

K. Rath ◽

S.D. Johnson

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Design and analysis of a low-power energy-recovery adder

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516026 ◽

2002 ◽

Cited By ~ 5

Author(s):

N. Tzartzanis ◽

W.C. Athas

Keyword(s):

Low Power ◽

Energy Recovery

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Design and manufacture of a 2K transistor p-well CMOS gate array in a student run factory at RIT

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516059 ◽

2002 ◽

Cited By ~ 1

Author(s):

L.F. Fuller ◽

C. Kraaijenvanger

Keyword(s):

Gate Array ◽

Design And Manufacture

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Bus minimization and scheduling of multi-chip systems

Proceedings. Fifth Great Lakes Symposium on VLSI ◽

10.1109/glsv.1995.516021 ◽

2002 ◽

Cited By ~ 3

Author(s):

M. Sheliga ◽

E. Hsing-Mean Sha

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Proceedings. Fifth Great Lakes Symposium on VLSILatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc. Press

A universal formalization of the effects of threshold voltages for discrete switch-level circuit models

Improving self-timed pipeline ring performance through the addition of buffer loops

Scan testing of asynchronous sequential circuits

A scalable shared buffer ATM switch architecture

Automated verification of temporal properties specified as state machines in VHDL

A personal computer based VLSI design curriculum

Specification and synthesis of bounded indirection

Design and analysis of a low-power energy-recovery adder

Design and manufacture of a 2K transistor p-well CMOS gate array in a student run factory at RIT

Bus minimization and scheduling of multi-chip systems

Proceedings. Fifth Great Lakes Symposium on VLSI
Latest Publications