29th VLSI Test Symposium
Latest Publications

TOTAL DOCUMENTS

69

(FIVE YEARS 0)

H-INDEX

11

(FIVE YEARS 0)

Published By IEEE

9781612846576

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Test and characterization of high-speed circuits

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783745 ◽

2011 ◽

Author(s):

Saghir Shaikh

Keyword(s):

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Low-cost diagnostic pattern generation and evaluation procedures for noise-related failures

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783739 ◽

2011 ◽

Author(s):

Junxia Ma ◽

Nisar Ahmed ◽

Mohammad Tehranipoor

Keyword(s):

Low Cost ◽

Pattern Generation ◽

Evaluation Procedures

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Harmony Widget for X-free scan testing

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783725 ◽

2011 ◽

Author(s):

Dilip K. Bhavsar

Keyword(s):

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Programmable extended SEC-DED codes for memory errors

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783774 ◽

2011 ◽

Author(s):

Valentin Gherman ◽

Samuel Evain ◽

Fabrice Auzanneau ◽

Yannick Bonhomme

Keyword(s):

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Advanced methods for leveraging new test standards

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783758 ◽

2011 ◽

Author(s):

Mike Laisne

Keyword(s):

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Power-aware test generation with guaranteed launch safety for at-speed scan testing

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783778 ◽

2011 ◽

Author(s):

X. Wen ◽

K. Enokimoto ◽

K. Miyase ◽

Y. Yamato ◽

M. A. Kochte ◽

...

Keyword(s):

Test Generation ◽

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On clustering of undetectable transition faults in standard-scan circuits

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783772 ◽

2011 ◽

Author(s):

Irith Pomeranz

Keyword(s):

Transition Faults ◽

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Dynamic scan clock control for test time reduction maintaining peak power limit

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783729 ◽

2011 ◽

Author(s):

Priyadharshini Shanmugasundaram ◽

Vishwani D. Agrawal

Keyword(s):

Test Time ◽

Test Time Reduction ◽

Dynamic Scan ◽

Time Reduction ◽

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Multi Domain Test: Novel test strategy to reduce the Cost of Test

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783738 ◽

2011 ◽

Author(s):

Yasuhiro Takahashi ◽

Akinori Maeda

Keyword(s):

Test Strategy ◽

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Design for Bit Error Rate estimation of high speed serial links

29th VLSI Test Symposium ◽

10.1109/vts.2011.5783734 ◽

2011 ◽

Author(s):

Ujjwal Guin ◽

Chen-Huan Chiang

Keyword(s):

Bit Error Rate ◽

Serial Links ◽

Rate Estimation

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