2010 IEEE Computer Society Annual Symposium on VLSI
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119

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9781424473212

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A Delay Model of Two-Cycle NoC Router in 2D-Mesh Network

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.22 ◽

2010 ◽

Author(s):

Shubo Qi ◽

Jinwen Li ◽

Zuocheng Xing ◽

Xiaomin Jia ◽

Minxuan Zhang

Keyword(s):

Mesh Network ◽

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A Calibration Circuit for Reconfigurable Smart ADC for Biomedical Signal Processing

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.85 ◽

2010 ◽

Author(s):

Salwa Mostafa ◽

Wenchao Qu ◽

Syed K. Islam ◽

Mohamed Mahfouz

Keyword(s):

Signal Processing ◽

Biomedical Signal Processing ◽

Biomedical Signal

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BBVC-3D-NoC: An Efficient 3D NoC Architecture Using Bidirectional Bisynchronous Vertical Channels

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.21 ◽

2010 ◽

Author(s):

Amir-Mohammad Rahmani ◽

Pasi Liljeberg ◽

Juha Plosila ◽

Hannu Tenhunen

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A Reverse Converter for the Enhanced Moduli Set {2n-1, 2n+1, 22n, 22n+1-1} Using CRT and MRC

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.105 ◽

2010 ◽

Author(s):

Amir Sabbagh Molahosseini ◽

Keivan Navi

Keyword(s):

Reverse Converter

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A Mesh-Buffer Displacement Optimization Strategy

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.108 ◽

2010 ◽

Author(s):

Guilherme Flach ◽

Gustavo Wilke ◽

Marcelo Johann ◽

Ricardo Reis

Keyword(s):

Optimization Strategy

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Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.65 ◽

2010 ◽

Author(s):

Prasenjit Biswas ◽

Pramod P. Udupa ◽

Rajdeep Mondal ◽

Keshavan Varadarajan ◽

Mythri Alle ◽

...

Keyword(s):

Linear Algebra ◽

Numerical Linear Algebra ◽

Run Time ◽

Reconfigurable Platform

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Data-Flow Driven Equivalence Checking for Verification of Code Motion Techniques

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.58 ◽

2010 ◽

Author(s):

Chandan Karfa ◽

Dipankar Sarkar ◽

Chittaranjan Mandal

Keyword(s):

Data Flow ◽

Equivalence Checking ◽

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LE1: A Parameterizable VLIW Chip-Multiprocessor with Hardware PThreads Support

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.107 ◽

2010 ◽

Author(s):

David Stevens ◽

Vassilios Chouliaras

Keyword(s):

Chip Multiprocessor

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Exploration of 2D Cellular Automata as Binary Sequence Generators

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.34 ◽

2010 ◽

Author(s):

Efthymia Arvaniti ◽

Ilias Mavridis ◽

Athanasios Kakarountas

Keyword(s):

Cellular Automata ◽

Binary Sequence

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Logical Core Algorithm: Improving Global Placement

2010 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2010.114 ◽

2010 ◽

Author(s):

Felipe Pinto ◽

Lucas Cavalheiro ◽

Marcelo Johann ◽

Ricardo Reis

Keyword(s):

Global Placement

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