Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference
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Published By IEEE Comput. Soc. Press

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A framework for macro- and micro-time to model VHDL attributes

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410686 ◽

2002 ◽

Author(s):

M. Belhadj ◽

R. McConnell ◽

P. Le Guernic

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Hierarchical test generation: Where we are, and where we should be going

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410673 ◽

2002 ◽

Author(s):

J.R. Armstrong

Keyword(s):

Test Generation

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VHD/sub e/LDO: A new mixed mode simulation

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410690 ◽

2002 ◽

Author(s):

H. El Tahawy ◽

D. Rodriguez ◽

S. Garcia-Sabiro ◽

J.-J. Mayol

Keyword(s):

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An approach to CAD database support of design consistency control

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410699 ◽

2002 ◽

Author(s):

B. Despres ◽

R. Piloty ◽

U. Schellin

Keyword(s):

Consistency Control ◽

Database Support ◽

Design Consistency

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A new optimization driven clustering algorithm for large circuits

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410612 ◽

2002 ◽

Author(s):

C.-L. Ding ◽

C.-Y. Ho ◽

M.J. Irwin

Keyword(s):

Clustering Algorithm

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Functional-level synthesis with VHDL

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410691 ◽

2002 ◽

Author(s):

J.P. Calvez ◽

D. Heller ◽

P. Bakowski

Keyword(s):

Functional Level

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JOGM: A CMOS cell layout style using jogged transistor gates

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410635 ◽

2002 ◽

Author(s):

R.D. Hindmarsh

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Computer-aided technique for optimal design of defect-tolerant VLSI with built-in redundancy

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410628 ◽

2002 ◽

Author(s):

I. Shagurin ◽

A. Ivanov

Keyword(s):

Optimal Design ◽

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REGGEN-Test pattern generation on register transfer level

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410647 ◽

2002 ◽

Author(s):

A. Magdolen ◽

J. Bezakova ◽

E. Gramatova ◽

M. Fischerova

Keyword(s):

Test Pattern ◽

Register Transfer Level ◽

Pattern Generation ◽

Test Pattern Generation ◽

Register Transfer

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Multi-way FSM decomposition based on interconnect complexity

Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference ◽

10.1109/eurdac.1993.410666 ◽

2002 ◽

Author(s):

W.-L. Yang ◽

R.M. Owens ◽

M.J. Irwin

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