2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL)
Latest Publications

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Published By IEEE

9781467394895

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Message from the Program Chair

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.5 ◽

2016 ◽

Keyword(s):

Program Chair

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Simple Characterizations of Perfect Residuated Lattices

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.28 ◽

2016 ◽

Author(s):

Michiro Kondo

Keyword(s):

Residuated Lattices

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Paraconsistent Double Negation That Can Simulate Classical Negation

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.12 ◽

2016 ◽

Cited By ~ 5

Author(s):

Norihiro Kamide

Keyword(s):

Double Negation ◽

Classical Negation

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The Pascal Triangle (1654), the Reed-Muller-Fourier Transform (1992), and the Discrete Pascal Transform (2005)

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.24 ◽

2016 ◽

Cited By ~ 3

Author(s):

Claudio Moraga ◽

Radomir S. Stankovic ◽

Milena Stankovic

Keyword(s):

Fourier Transform ◽

Pascal Triangle

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SPRUCE, an Embedded Compact Stack Machine for IGBT Power Modules

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.59 ◽

2016 ◽

Cited By ~ 1

Author(s):

A. Shorten ◽

W. T. Ng

Keyword(s):

Power Modules

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New Two-Qubit Gate Library with Entanglement

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.26 ◽

2016 ◽

Author(s):

Md Belayet Ali ◽

Takashi Hirayama ◽

Katsuhisa Yamanaka ◽

Yasuaki Nishitani

Keyword(s):

Qubit Gate

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Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.50 ◽

2016 ◽

Author(s):

Daisuke Suzuki ◽

Takahiro Hanyu

Keyword(s):

Energy Efficient ◽

Power Gating ◽

Gating Scheme

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Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.36 ◽

2016 ◽

Cited By ~ 1

Author(s):

Zaid Alwardi ◽

Robert Wille ◽

Rolf Drechsler

Keyword(s):

Reversible Circuits

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Logic Synthesis for Quantum State Generation

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.30 ◽

2016 ◽

Cited By ~ 4

Author(s):

Philipp Niemann ◽

Rhitam Datta ◽

Robert Wille

Keyword(s):

Quantum State ◽

Logic Synthesis ◽

State Generation

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Message from the Symposium Chair

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL) ◽

10.1109/ismvl.2016.4 ◽

2016 ◽

Download Full-text

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Message from the Program Chair

Simple Characterizations of Perfect Residuated Lattices

Paraconsistent Double Negation That Can Simulate Classical Negation

The Pascal Triangle (1654), the Reed-Muller-Fourier Transform (1992), and the Discrete Pascal Transform (2005)

SPRUCE, an Embedded Compact Stack Machine for IGBT Power Modules

New Two-Qubit Gate Library with Entanglement

Energy-Efficient and Highly-Reliable Nonvolatile FPGA Using Self-Terminated Power-Gating Scheme

Re-Writing HDL Descriptions for Line-Aware Synthesis of Reversible Circuits

Logic Synthesis for Quantum State Generation

Message from the Symposium Chair

2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL)
Latest Publications