Evaluation of thermal couple impedance model of power modules for accurate die temperature estimation up to 200 ◦C

This paper presents an experimental evaluation of the thermal couple impedance model of power modules (PMs), in which Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) dies are implemented. The model considers the thermal cross-coupling effect, representing the temperature rise of a die due to power dissipations by the other dies in the same PM. We propose a characterization method to obtain the thermal couple impedance of the SiC MOSFET-based PMs for model accuracy. Simulation based on the proposed model accurately estimates the measured die temperature of three PMs with different die placements. The maximum error between measured and simulated die temperatures is within 8.1 ◦C in a wide and practical operation range from 70 ◦C to 200 ◦C. The thermal couple impedance model is helpful to design die placements of high power PMs considering the thermal cross-coupling effect.

Thermal and Electrical Co-Optimization of a Multi-Chip Double-Sided Cooled GaN Module

The need for high power density electrical converters/inverters dominates the power electronics realm, and wide bandgap semiconducting materials, such as gallium nitride (GaN), provide the enhanced material properties necessary to drive at higher switching speeds than traditional silicon. However, lateral GaN devices introduce packaging difficulties, especially when attempting a double-sided cooled solution. Herein, we describe optimization efforts for a 650V/30A, GaN half-bridge power module with an integrated gate driver and double-sided cooling capability. Two direct bonded copper (DBC) substrates provided the primary means of heat removal from the module. In addition to the novel topology, the team performed electrical/thermal co-design to increase the multi-functionality of module. Since a central PCB comprised the main power loop, the size and geometry of the vias and copper traces was analyzed to determine optimal functionality in terms of parasitic inductance and thermal spreading. Thermally, thicker copper layers and additional vias introduced into the PCB also helped reduce hot spots within the module. Upon fabrication of the module, it underwent electrical characterization to determine switching performance, as well as thermal characterization to experimentally measure the total module’s thermal resistance. The team successfully operated the module at 400 V, 30 A with a power loop parasitic inductance of 0.89 nH; experimental thermal measurements also indicated the module thermal resistance to be 0.43 C/W. The overall utility of the design improved commensurately by introducing simple, yet effective electrical/thermal co-design strategies, which can be applied to future power modules.