Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95
Latest Publications

TOTAL DOCUMENTS

132

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Published By IEEE

4930813670

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

BIST with negligible aliasing through random cover circuits

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486227 ◽

2002 ◽

Cited By ~ 1

Author(s):

T. Bogue ◽

H. Jurgensen ◽

M. Gossel

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Finding best cones from random clusters for FPGA package partitioning

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486405 ◽

2002 ◽

Cited By ~ 2

Author(s):

D. Brasen ◽

J.P. Hiol ◽

G. Saucier

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An intelligent, self-deducing graphical register transfer interface based on a distributed constraint logic computation

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486373 ◽

2002 ◽

Author(s):

G. Jennings

Keyword(s):

Logic Computation

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Flexible optimization of fixed polarity Reed-Muller expansions for multiple output completely and incompletely specified Boolean functions

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486242 ◽

2002 ◽

Author(s):

Chip-Hong Chang ◽

B.J. Falkowski

Keyword(s):

Boolean Functions

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Synthesis and simulation of digital demodulator for infrared data communication

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486349 ◽

2002 ◽

Cited By ~ 2

Author(s):

H. Uno ◽

K. Kumatani ◽

I. Shirakawa ◽

T. Chiba

Keyword(s):

Data Communication ◽

Infrared Data

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Exploiting signal flow and logic dependency in standard cell placement

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486251 ◽

2002 ◽

Cited By ~ 2

Author(s):

J. Cong ◽

D. Xu

Keyword(s):

Standard Cell ◽

Signal Flow ◽

Cell Placement

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Description and verification of RTL designs using multiway decision graphs

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486372 ◽

2002 ◽

Author(s):

Zijian Zhou ◽

Xiaoyn Song ◽

F. Corella ◽

E. Cerny ◽

M. Langevin

Keyword(s):

Multiway Decision Graphs

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A framework for the analysis and design of algorithms for a class of VLSI-CAD optimization problems

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486204 ◽

2002 ◽

Author(s):

C.-J. Shi ◽

J.A. Brzozowski

Keyword(s):

Optimization Problems ◽

Design Of Algorithms ◽

Analysis And Design ◽

Vlsi Cad

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Delay abstraction in combinational logic circuits

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486355 ◽

2002 ◽

Author(s):

N. Kobayashi ◽

S. Malik

Keyword(s):

Logic Circuits ◽

Combinational Logic ◽

Combinational Logic Circuits

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An efficient design environment and algorithms for transport processing FPGA

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95 ◽

10.1109/aspdac.1995.486404 ◽

2002 ◽

Cited By ~ 9

Author(s):

A. Tsutsui ◽

T. Miyazaki

Keyword(s):

Efficient Design ◽

Design Environment

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Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

BIST with negligible aliasing through random cover circuits

Finding best cones from random clusters for FPGA package partitioning

An intelligent, self-deducing graphical register transfer interface based on a distributed constraint logic computation

Flexible optimization of fixed polarity Reed-Muller expansions for multiple output completely and incompletely specified Boolean functions

Synthesis and simulation of digital demodulator for infrared data communication

Exploiting signal flow and logic dependency in standard cell placement

Description and verification of RTL designs using multiway decision graphs

A framework for the analysis and design of algorithms for a class of VLSI-CAD optimization problems

Delay abstraction in combinational logic circuits

An efficient design environment and algorithms for transport processing FPGA

Proceedings of ASP-DAC 95/CHDL 95/VLSI 95 with EDA Technofair ASPDAC-95
Latest Publications