2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
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9781538662403

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Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00032 ◽

2018 ◽

Cited By ~ 11

Author(s):

Yaohua Wang ◽

Arash Tavakkol ◽

Lois Orosa ◽

Saugata Ghose ◽

Nika Mansouri Ghiasi ◽

...

Keyword(s):

Partial Restoration ◽

Look Ahead

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2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00004 ◽

2018 ◽

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Diffy: a Déjà vu-Free Differential Deep Neural Network Accelerator

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00020 ◽

2018 ◽

Cited By ~ 17

Author(s):

Mostafa Mahmoud ◽

Kevin Siu ◽

Andreas Moshovos

Keyword(s):

Neural Network ◽

Deep Neural Network ◽

Deja Vu ◽

Déjà Vu

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Sampler: PMU-Based Sampling to Detect Memory Errors Latent in Production Software

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00027 ◽

2018 ◽

Cited By ~ 2

Author(s):

Sam Silvestro ◽

Hongyu Liu ◽

Tong Zhang ◽

Changhee Jung ◽

Dongyoon Lee ◽

...

Keyword(s):

Memory Errors ◽

Production Software

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Towards Memory Friendly Long-Short Term Memory Networks (LSTMs) on Mobile GPUs

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00022 ◽

2018 ◽

Cited By ~ 6

Author(s):

Xingyao Zhang ◽

Chenhao Xie ◽

Jing Wang ◽

Weidong Zhang ◽

Xin Fu

Keyword(s):

Short Term Memory ◽

Short Term ◽

Term Memory ◽

Long Short Term Memory ◽

Mobile Gpus

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Title Page iii

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00002 ◽

2018 ◽

Keyword(s):

Title Page

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PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00069 ◽

2018 ◽

Cited By ~ 4

Author(s):

Yatin A. Manerkar ◽

Daniel Lustig ◽

Margaret Martonosi ◽

Aarti Gupta

Keyword(s):

Memory Consistency ◽

Consistency Proofs

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Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00026 ◽

2018 ◽

Cited By ~ 1

Author(s):

Mark C. Jeffrey ◽

Victor A. Ying ◽

Suvinay Subramanian ◽

Hyun Ryong Lee ◽

Joel Emer ◽

...

Keyword(s):

Speculative Execution

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Invalid Data-Aware Coding to Enhance the Read Performance of High-Density Flash Memories

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00046 ◽

2018 ◽

Cited By ~ 4

Author(s):

Wonil Choi ◽

Myoungsoo Jung ◽

Mahmut Kandemir

Keyword(s):

High Density ◽

Flash Memories

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Exploiting Locality in Graph Analytics through Hardware-Accelerated Traversal Scheduling

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) ◽

10.1109/micro.2018.00010 ◽

2018 ◽

Cited By ~ 18

Author(s):

Anurag Mukkara ◽

Nathan Beckmann ◽

Maleen Abeydeera ◽

Xiaosong Ma ◽

Daniel Sanchez

Keyword(s):

Graph Analytics

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2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration

Table of Contents

Diffy: a Déjà vu-Free Differential Deep Neural Network Accelerator

Sampler: PMU-Based Sampling to Detect Memory Errors Latent in Production Software

Towards Memory Friendly Long-Short Term Memory Networks (LSTMs) on Mobile GPUs

Title Page iii

PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications

Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism

Invalid Data-Aware Coding to Enhance the Read Performance of High-Density Flash Memories

Exploiting Locality in Graph Analytics through Hardware-Accelerated Traversal Scheduling

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2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration

Table of Contents

Diffy: a Déjà vu-Free Differential Deep Neural Network Accelerator

Sampler: PMU-Based Sampling to Detect Memory Errors Latent in Production Software

Towards Memory Friendly Long-Short Term Memory Networks (LSTMs) on Mobile GPUs

Title Page iii

PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications

Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism

Invalid Data-Aware Coding to Enhance the Read Performance of High-Density Flash Memories

Exploiting Locality in Graph Analytics through Hardware-Accelerated Traversal Scheduling

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
Latest Publications