7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781467325721, 9781467325707, 9781467325714

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Fault-tolerant network interface for spatial division multiplexing based Network-on-Chip

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322894 ◽

2012 ◽

Cited By ~ 2

Author(s):

Anup Das ◽

Akash Kumar ◽

Bharadwaj Veeravalli

Keyword(s):

Fault Tolerant ◽

Network On Chip ◽

Network Interface ◽

On Chip ◽

Spatial Division Multiplexing

Download Full-text

Smart technologies for effective reconfiguration: The FASTER approach

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322881 ◽

2012 ◽

Cited By ~ 4

Author(s):

M. D. Santambrogio ◽

D. Pnevmatikatos ◽

K. Papadimitriou ◽

C. Pilato ◽

G. Gaydadjiev ◽

...

Keyword(s):

Smart Technologies

Download Full-text

Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322897 ◽

2012 ◽

Cited By ~ 2

Author(s):

Haoyuan Ying ◽

Thomas Hollstein ◽

Klaus Hofmann

Keyword(s):

Vertical Channel ◽

High Level Synthesis ◽

Networks On Chip ◽

3 Dimensional ◽

Channel Density ◽

On Chip ◽

High Level

Download Full-text

[Copyright notice]

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322866 ◽

2012 ◽

Keyword(s):

Download Full-text

Transport layer aware design of network interface in many-core systems

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322895 ◽

2012 ◽

Cited By ~ 5

Author(s):

Mohammad Fattah ◽

Masoud Daneshtalab ◽

Pasi Liljeberg ◽

Juha Plosila

Keyword(s):

Transport Layer ◽

Network Interface ◽

Many Core

Download Full-text

Fast integration of hardware accelerators for dynamically reconfigurable architecture

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322902 ◽

2012 ◽

Cited By ~ 1

Author(s):

Clement Foucher ◽

Fabrice Muller ◽

Alain Giulieri

Keyword(s):

Reconfigurable Architecture ◽

Hardware Accelerators ◽

Dynamically Reconfigurable ◽

Dynamically Reconfigurable Architecture

Download Full-text

ENOSYS FP7 EU project: An integrated modeling and synthesis flow for embedded systems design

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322880 ◽

2012 ◽

Author(s):

Etienne Brosse ◽

Imran R Quadri ◽

Andrey Sadovykh ◽

Frank Ieromnimon ◽

Dimitrios Kritharidis ◽

...

Keyword(s):

Embedded Systems ◽

Systems Design ◽

Integrated Modeling ◽

Eu Project

Download Full-text

A RTRM proposal for multi/many-core platforms and reconfigurable applications

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322885 ◽

2012 ◽

Cited By ~ 17

Author(s):

Patrick Bellasi ◽

Giuseppe Massari ◽

William Fornaciari

Keyword(s):

Many Core

Download Full-text

Invited paper: On-chip monitoring for adaptive heterogeneous multicore systems

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322872 ◽

2012 ◽

Cited By ~ 1

Author(s):

Diana Goehringer ◽

Mounir Chemaou ◽

Michael Huebner

Keyword(s):

Multicore Systems ◽

Heterogeneous Multicore ◽

On Chip

Download Full-text

Designing formal reconfiguration control using UML/MARTE

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC) ◽

10.1109/recosoc.2012.6322870 ◽

2012 ◽

Cited By ~ 11

Author(s):

Sebastien Guillet ◽

Florent de Lamotte ◽

Nicolas Le Griguer ◽

Eric Rutten ◽

Guy Gogniat ◽

...

Keyword(s):

Uml Marte

Download Full-text

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Fault-tolerant network interface for spatial division multiplexing based Network-on-Chip

Smart technologies for effective reconfiguration: The FASTER approach

Communication-centric high level synthesis metrics for low vertical channel density 3-dimensional Networks-on-Chip

[Copyright notice]

Transport layer aware design of network interface in many-core systems

Fast integration of hardware accelerators for dynamically reconfigurable architecture

ENOSYS FP7 EU project: An integrated modeling and synthesis flow for embedded systems design

A RTRM proposal for multi/many-core platforms and reconfigurable applications

Invited paper: On-chip monitoring for adaptive heterogeneous multicore systems

Designing formal reconfiguration control using UML/MARTE

7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)
Latest Publications