dynamically reconfigurable architecture Recently Published Documents

2017 26th International Conference on Computer Communication and Networks (ICCCN) ◽

Dynamically Reconfigurable Architecture for Fault-Tolerant 2D Networks-on-Chip

10.1109/icccn.2017.8038407 ◽

2017 ◽

Author(s):

Poona Bahrebar ◽

Azarakhsh Jalalvand ◽

Dirk Stroobandt

Keyword(s):

Fault Tolerant ◽

Networks On Chip ◽

On Chip ◽

2017 International Conference on Advanced Technologies for Signal and Image Processing (ATSIP) ◽

Design of a dynamically reconfigurable architecture for the 3D image synthesis

10.1109/atsip.2017.8075556 ◽

2017 ◽

Author(s):

Nader Ben Amor ◽

Khaled Lahbib ◽

Tarek Frikha

Keyword(s):

Image Synthesis ◽

3D Image ◽

DeepRecon: Dynamically reconfigurable architecture for accelerating deep neural networks

2017 International Joint Conference on Neural Networks (IJCNN) ◽

10.1109/ijcnn.2017.7965844 ◽

2017 ◽

Author(s):

Tayyar Rzayev ◽

Saber Moradi ◽

David H. Albonesi ◽

Rajit Manchar

Keyword(s):

Neural Networks ◽

Deep Neural Networks ◽

Dynamically Reconfigurable Architecture with Atomic Configuration Updates for Flexible Regular Expressions Matching in FPGA

2016 Euromicro Conference on Digital System Design (DSD) ◽

10.1109/dsd.2016.109 ◽

2016 ◽

Author(s):

Vlastimil Koar ◽

Jan Korenek

Keyword(s):

Regular Expressions ◽

Atomic Configuration ◽

Dynamically reconfigurable architecture for symmetric ciphers

Science China Information Sciences ◽

10.1007/s11432-015-5381-z ◽

2016 ◽

Vol 59 (4) ◽

Cited By ~ 4

Author(s):

Bo Wang ◽

Leibo Liu

Keyword(s):

Symmetric Ciphers ◽

HyDRA: Hybrid Dynamically Reconfigurable Architecture for DSP Applications

IEICE Transactions on Electronics ◽

10.1587/transele.e99.c.866 ◽

2016 ◽

Vol E99.C (7) ◽

pp. 866-877 ◽

Author(s):

Abdulfattah M. OBEID ◽

Syed Manzoor QASIM ◽

Mohammed S. BENSALEH ◽

Abdullah A. ALJUFFRI

Keyword(s):

Dsp Applications ◽

FDR 2.0: A Low-Power Dynamically Reconfigurable Architecture and Its FinFET Implementation

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2014.2360067 ◽

2015 ◽

Vol 23 (10) ◽

pp. 1987-2000 ◽

Cited By ~ 6

Author(s):

Ting-Jung Lin ◽

Wei Zhang ◽

Niraj K. Jha

Keyword(s):

Low Power ◽

A Fine-Grain Dynamically Reconfigurable Architecture Aimed at Reducing the FPGA-ASIC Gaps

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2013.2294694 ◽

2014 ◽

Vol 22 (12) ◽

pp. 2607-2620 ◽

Cited By ~ 11

Author(s):

Ting-Jung Lin ◽

Wei Zhang ◽

Niraj K. Jha

Keyword(s):

Fine Grain ◽

A dynamically reconfigurable architecture for emergency and disaster management in ITS

2014 International Conference on Connected Vehicles and Expo (ICCVE) ◽

10.1109/iccve.2014.7297593 ◽

2014 ◽

Author(s):

Smail Niar ◽

Arda Yurdakul ◽

Osman Unsal ◽

Tuna Tugcu ◽

Aziz Yuceturk

Keyword(s):

Disaster Management ◽