2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Latest Publications

TOTAL DOCUMENTS

126

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Published By IEEE

9781728133911

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iMACE: In-Memory Acceleration of Classic McEliece Encoder

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00098 ◽

2019 ◽

Author(s):

Karthikeyan Nagarajan ◽

Sina Sayyah Ensan ◽

Swagata Mandal ◽

Swaroop Ghosh ◽

Anupam Chattopadhyay

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Machine Learning-Based Processor Adaptability Targeting Energy, Performance, and Reliability

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00037 ◽

2019 ◽

Author(s):

Anderson Luiz Sartor ◽

Pedro Henrique Exenberger Becker ◽

Stephan Wong ◽

Radu Marculescu ◽

Antonio Carlos Schneider Beck

Keyword(s):

Machine Learning ◽

Energy Performance

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Copyright Page

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00003 ◽

2019 ◽

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Using Harmonized Parabolic Synthesis to Implement a Single-Precision Floating-Point Square Root Unit

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00116 ◽

2019 ◽

Author(s):

Suleyman Savas ◽

Yassin Atwa ◽

Tomas Nordstrom ◽

Zain Ul-Abdin

Keyword(s):

Floating Point ◽

Square Root ◽

Single Precision

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A Case Study On Approximate FPGA Design With an Open-Source Image Processing Platform

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00074 ◽

2019 ◽

Author(s):

Yunxiang Zhang ◽

Xiaokun Yang ◽

Lei Wu ◽

Jean H. Andrian

Keyword(s):

Image Processing ◽

Open Source ◽

Source Image ◽

Fpga Design ◽

Processing Platform

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ISVLSI Steering Committee

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00008 ◽

2019 ◽

Keyword(s):

Steering Committee

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Hardware Implementation of Improved Fast-SSC-Flip Decoder for Polar Codes

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00109 ◽

2019 ◽

Cited By ~ 2

Author(s):

Jing Zeng ◽

Yangcan Zhou ◽

Jun Lin ◽

Zhongfeng Wang

Keyword(s):

Hardware Implementation ◽

Polar Codes

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IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00042 ◽

2019 ◽

Author(s):

Ruizhe Cai ◽

Xiaolong Ma ◽

Olivia Chen ◽

Ao Ren ◽

Ning Liu ◽

...

Keyword(s):

Logic Synthesis ◽

Superconducting Circuits ◽

Quantum Flux

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Countering Botnet of Things using Blockchain-Based Authenticity Framework

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00112 ◽

2019 ◽

Cited By ~ 2

Author(s):

Pinchen Cui ◽

Ujjwal Guin

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ASSET: Architectures for Smart Security of Non-Volatile Memories

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) ◽

10.1109/isvlsi.2019.00070 ◽

2019 ◽

Author(s):

Shivam Swami ◽

Kartik Mohanram

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2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

iMACE: In-Memory Acceleration of Classic McEliece Encoder

Machine Learning-Based Processor Adaptability Targeting Energy, Performance, and Reliability

Copyright Page

Using Harmonized Parabolic Synthesis to Implement a Single-Precision Floating-Point Square Root Unit

A Case Study On Approximate FPGA Design With an Open-Source Image Processing Platform

ISVLSI Steering Committee

Hardware Implementation of Improved Fast-SSC-Flip Decoder for Polar Codes

IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits

Countering Botnet of Things using Blockchain-Based Authenticity Framework

ASSET: Architectures for Smart Security of Non-Volatile Memories

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Latest Publications