Proceedings of the 2005 international symposium on physical design - ISPD '05
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Technology migration technique for designs with strong RET-driven layout restrictions

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055172 ◽

2005 ◽

Cited By ~ 8

Author(s):

Xin Yuan ◽

Kevin W. McCullen ◽

Fook-Luen Heng ◽

Robert F. Walker ◽

Jason Hibbeler ◽

...

Keyword(s):

Technology Migration ◽

Migration Technique

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Modern floorplanning based on fast simulated annealing

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055161 ◽

2005 ◽

Cited By ~ 35

Author(s):

Tung-Chieh Chen ◽

Yao-Wen Chang

Keyword(s):

Simulated Annealing

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The death of logic synthesis

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055138 ◽

2005 ◽

Author(s):

Rajeev Madhavan

Keyword(s):

Logic Synthesis

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Improved algorithms for link-based non-tree clock networks for skew variability reduction

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055150 ◽

2005 ◽

Cited By ~ 17

Author(s):

Anand Rajaram ◽

David Z. Pan ◽

Jiang Hu

Keyword(s):

Clock Networks

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An efficient technology mapping algorithm targeting routing congestion under delay constraints

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055166 ◽

2005 ◽

Cited By ~ 8

Author(s):

Rupesh S. Shelar ◽

Prashant Saxena ◽

Xinning Wang ◽

Sachin S. Sapatnekar

Keyword(s):

Technology Mapping ◽

Efficient Technology ◽

Mapping Algorithm ◽

Delay Constraints ◽

Routing Congestion

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Kraftwerk

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055190 ◽

2005 ◽

Cited By ~ 11

Author(s):

Bernd Obermeier ◽

Hans Ranke ◽

Frank M. Johannes

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Geometric programming for circuit optimization

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055148 ◽

2005 ◽

Cited By ~ 17

Author(s):

Stephen P. Boyd ◽

Seung Jean Kim

Keyword(s):

Geometric Programming ◽

Circuit Optimization

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Mapping algorithm for large-scale field programmable analog array

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055168 ◽

2005 ◽

Cited By ~ 1

Author(s):

Faik Baskaya ◽

Sasank Reddy ◽

Sung Kyu Lim ◽

Tyson Hall ◽

David V. Anderson

Keyword(s):

Large Scale ◽

Mapping Algorithm ◽

Programmable Analog ◽

Scale Field ◽

Field Programmable ◽

Large Scale Field ◽

Field Programmable Analog Array

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Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055145 ◽

2005 ◽

Cited By ~ 48

Author(s):

Chris Chu ◽

Yiu-Chung Wong

Keyword(s):

Vlsi Design ◽

Minimal Tree ◽

Steiner Minimal Tree ◽

Tree Algorithm

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Routing of analog busses with parasitic symmetry

Proceedings of the 2005 international symposium on physical design - ISPD '05 ◽

10.1145/1055137.1055143 ◽

2005 ◽

Cited By ~ 2

Author(s):

Lars Schreiner ◽

Markus Olbrich ◽

Erich Barke ◽

Volker Meyer zu Bexten

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Proceedings of the 2005 international symposium on physical design - ISPD '05Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Technology migration technique for designs with strong RET-driven layout restrictions

Modern floorplanning based on fast simulated annealing

The death of logic synthesis

Improved algorithms for link-based non-tree clock networks for skew variability reduction

An efficient technology mapping algorithm targeting routing congestion under delay constraints

Kraftwerk

Geometric programming for circuit optimization

Mapping algorithm for large-scale field programmable analog array

Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design

Routing of analog busses with parasitic symmetry

Proceedings of the 2005 international symposium on physical design - ISPD '05
Latest Publications