A high‐resolution all‐digital pulse‐width modulator architecture with a tunable delay element in CMOS
2020 ◽
Vol 48
(8)
◽
pp. 1329-1345
◽
2015 ◽
Vol 123
(16)
◽
pp. 18-23
Keyword(s):
2013 ◽
Vol 28
(10)
◽
pp. 4466-4472
◽