FPGA – based High Resolution Digital Pulse Width Modulator with Minimum Sequential Reset Logic
2015 ◽
Vol 123
(16)
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pp. 18-23
Gaurav Gupta
◽
Sangeeta Nakhate
◽
Shubham Gupta
E. F. C. Grabovski
◽
S. A. Mussa
2020 ◽
Vol 48
(8)
◽
pp. 1329-1345
◽
Juan Ignacio Morales
◽
Fernando Chierchie
◽
Pablo Sergio Mandolesi
◽
Eduardo Emilio Paolini
Xin Cheng
◽
Bin Li
◽
Haowen Zhu
◽
Yongqiang Zhang
◽
Zhang Zhang
V. Sabarinath
◽
K. Sivanandam
D. Navarro
◽
L.A. Barragan
◽
J.I. Artigas
◽
I. Urriza
◽
O. Lucia
◽
...
A. Syed
◽
E. Ahmed
◽
D. Maksimovic
◽
E. Alarcon
Santa C. Huerta
◽
A. de Castro
◽
O. Garcia
◽
J.A. Cobos
Yoontaek Lee
◽
Juyun Lee
◽
Jaeha Kim
2013 ◽
Vol 28
(10)
◽
pp. 4466-4472
◽
Daniel Costinett
◽
Miguel Rodriguez
◽
Dragan Maksimovic