In this paper, we are presenting fast digital to analog convertor designs using Spatial Waveform Switched FETs (SWSFET). SWSFET was introduced by Jain et.al. These FETs have multiple channels stacked vertically. The Carrier wavefunction switches from one channel to another with the application of different gate voltages. Designs of multi-bit SRAM, logic and sequential cells using SWSFETs have been demonstrated. Here we are introducing the use of SWSFET in mixed signal architectures. Single cycle architectures for two-bit, four-bit and eight-bit analog to digital converters are presented. Four bit architecture has been simulated and results are discussed. SWSFET presents the opportunity with its multiple stacked channel features to extend the Moors law using next generation of devices.