Porous Silicon Micromachining Technology

2014 ◽  
pp. 779-785
Author(s):  
Giuseppe Barillaro
ETRI Journal ◽  
2005 ◽  
Vol 27 (4) ◽  
pp. 433-438 ◽  
Author(s):  
Young-Min Kim Kim ◽  
Ho-Cheol Yoon Yoon ◽  
Jong-Hyun Lee Lee

1996 ◽  
Vol 459 ◽  
Author(s):  
G. Kaltsas ◽  
A. G. Nassiopoulos

ABSTRACTA fully C-MOS compatible process for bulk silicon micromachining using porous silicon technology and front-side lithography is developed. The process is based on the use of porous silicon as a sacrificial layer for the fabrication of deep cavities into monocrystalline silicon, so as to avoid back side lithography. Cavities as deep as several hundreds of micrometers are produced with very smooth surface and sidewalls. The process is used to produce : a) suspended monocrystalline silicon membranes, b) free standing polysilicon membranes in the form of bridges or cantilevers with lateral dimensions from a few μms to several hundreds of μms. Important applications to silicon integrated devices as sensors, actuators, detectors etc., are foreseen.


2006 ◽  
Vol 23 (5) ◽  
pp. 1331-1334 ◽  
Author(s):  
Yue Rui-Feng ◽  
Dong Liang ◽  
Liu Li-Tian

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