Clock Generators for Heterogeneous MPSoCs Within 3D Chip Stacks

2003 ◽

Cited By ~ 1

Author(s):

D.E. Calbaza ◽

Y. Savaria

Keyword(s):

Direct Digital Synthesis ◽

Digital Synthesis ◽

Clock Generators ◽

Jitter Model

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A Low Overhead Fault Detection and Recovery Method for the Faults in Clock Generators

2009 IEEE Circuits and Systems International Conference on Testing and Diagnosis ◽

10.1109/cas-ictd.2009.4960750 ◽

2009 ◽

Cited By ~ 1

Author(s):

Nima Karimpour Darav ◽

Mohammad Amin Amiri ◽

Alireza Ejlali

Keyword(s):

Fault Detection ◽

Recovery Method ◽

Clock Generators

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Short-term frequency stability of clock generators for multigigahertz rapid-single-flux quantum digital circuits

IEEE Transactions on Applied Superconductivity ◽

10.1109/tasc.2003.811351 ◽

2003 ◽

Vol 13 (1) ◽

pp. 25-37 ◽

Cited By ~ 6

Author(s):

C.A. Mancini ◽

M.F. Bocko

Keyword(s):

Digital Circuits ◽

Frequency Stability ◽

Flux Quantum ◽

Short Term ◽

Term Frequency ◽

Rapid Single Flux Quantum ◽

Clock Generators

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A 512-bit shift register using compact two-phase single flux quantum clock generators with large margins and low power

IEEE Transactions on Applied Superconductivity ◽

10.1109/77.251814 ◽

1993 ◽

Vol 3 (4) ◽

pp. 3116-3118 ◽

Cited By ~ 2

Author(s):

P. Yuh

Keyword(s):

Low Power ◽

Shift Register ◽

Flux Quantum ◽

Two Phase ◽

Clock Generators

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Low phase noise programmable clock generators for wireless modems

1999 2nd IEEE Workshop on Signal Processing Advances in Wireless Communications (Cat. No.99EX304) ◽

10.1109/spawc.1999.783035 ◽

2003 ◽

Cited By ~ 1

Author(s):

J. Belzile ◽

N. Batani

Keyword(s):

Phase Noise ◽

Clock Generators ◽

Low Phase Noise

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Analyses and design of low power clock generators for RFID TAGs

2008 Ph.D. Research in Microelectronics and Electronics ◽

10.1109/rme.2008.4595755 ◽

2008 ◽

Cited By ~ 10

Author(s):

Christian Klapf ◽

Albert Missoni ◽

Wolfgang Pribyl ◽

Gerald Holweg ◽

Gunter Hofer

Keyword(s):

Low Power ◽

Rfid Tags ◽

Clock Generators

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An FIR-Embedded Noise Filtering Method for $\Delta \Sigma$ Fractional-N PLL Clock Generators

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2009.2021086 ◽

2009 ◽

Vol 44 (9) ◽

pp. 2426-2436 ◽

Cited By ~ 30

Author(s):

Xueyi Yu ◽

Yuanfeng Sun ◽

Woogeun Rhee ◽

Zhihua Wang

Keyword(s):

Noise Filtering ◽

Filtering Method ◽

Delta Sigma ◽

Clock Generators

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