Performance Analysis of the Impact of Design Parameters to Network-on-Chip (NoC) Architecture

Recent Trends in Information and Communication Technology - Lecture Notes on Data Engineering and Communications Technologies ◽

10.1007/978-3-319-59427-9_26 ◽

2017 ◽

pp. 237-246

Author(s):

Ng Yen Phing ◽

M. N. Mohd Warip ◽

Phaklen Ehkan ◽

F. W. Zulkefli ◽

R. Badlishah Ahmad

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

Design Parameters ◽

On Chip ◽

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An accurate and efficient performance analysis approach based on queuing model for Network on Chip

Proceedings of the 2009 International Conference on Computer-Aided Design - ICCAD '09 ◽

10.1145/1687399.1687505 ◽

2009 ◽

Author(s):

Mingche Lai ◽

Lei Gao ◽

Nong Xiao ◽

Zhiying Wang

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

Analysis Approach ◽

Queuing Model ◽

Efficient Performance ◽

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Performance Analysis of Network-on-Chip Topologies for Elbrus Multi-Core Processors

2020 International Conference Engineering and Telecommunication (En&T) ◽

10.1109/ent50437.2020.9431279 ◽

2020 ◽

Author(s):

Evgenii Kozhin ◽

Alexey Kozhin ◽

Danil Shpagilev

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

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Parametric Performance Analysis of Synchronous and Asynchronous Heterogeneous Network on Chip

2016 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS) ◽

10.1109/inis.2016.035 ◽

2016 ◽

Author(s):

Ayas Kanta Swain ◽

Anil Kumar Rajput ◽

Kamalakanta Mahapatra

Keyword(s):

Performance Analysis ◽

Heterogeneous Network ◽

Network On Chip ◽

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Model of Network-on-Chip routers and performance analysis

IEICE Electronics Express ◽

10.1587/elex.8.986 ◽

2011 ◽

Vol 8 (13) ◽

pp. 986-993 ◽

Author(s):

Youhui Zhang ◽

Xiaoguo Dong ◽

Siqing Gan ◽

Weimin Zheng

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

And Performance ◽

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Performance analysis of network-on-chip in many-core processors

Journal of Parallel and Distributed Computing ◽

10.1016/j.jpdc.2020.09.013 ◽

2021 ◽

Vol 147 ◽

pp. 196-208

Author(s):

A. Vijaya Bhaskar ◽

T.G. Venkatesh

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

On Chip ◽

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Simulation and performance analysis of network on chip architectures using OPNET

2007 7th International Conference on ASIC ◽

10.1109/icasic.2007.4415871 ◽

2007 ◽

Author(s):

Wu Ning ◽

Ge Fen ◽

Wang Qi

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

And Performance ◽

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Performance analysis and comparison of 2×4 network on chip topology

Microprocessors and Microsystems ◽

10.1016/j.micpro.2012.04.006 ◽

2012 ◽

Vol 36 (6) ◽

pp. 505-509 ◽

Author(s):

Xingang Ju ◽

Liang Yang

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

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Performance Analysis of Routing Algorithms in Mesh Based Network on Chip using Booksim Simulator

2019 IEEE International Conference of Intelligent Applied Systems on Engineering (ICIASE) ◽

10.1109/iciase45644.2019.9074082 ◽

2019 ◽

Author(s):

Wooshik Myung ◽

Zhao Qi ◽

Ma Cheng

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

Routing Algorithms ◽

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Power and performance analysis of 3D network-on-chip architectures

Computers & Electrical Engineering ◽

10.1016/j.compeleceng.2020.106592 ◽

2020 ◽

Vol 83 ◽

pp. 106592

Author(s):

Bheemappa Halavar ◽

Basavaraj Talawar

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

And Performance ◽

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Performance analysis and optimizations for network on chip paradigm

10.14711/thesis-b1626290 ◽

2016 ◽

Author(s):

Vineeth Mohan

Keyword(s):

Performance Analysis ◽

Network On Chip ◽

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