Low-Power Content Addressable Memory With Read/Write and Matched Mask Ports

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_8 ◽

2007 ◽

pp. 75-85

Author(s):

Saleh Abdel-Hafeez ◽

Shadi M. Harb ◽

William R. Eisenstadt

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Power Content

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Low-Power Content Addressable Memory Using 2N-2N2P Circuits

2006 International Conference on Communications, Circuits and Systems ◽

10.1109/icccas.2006.285218 ◽

2006 ◽

Cited By ~ 3

Author(s):

Wu Yangbo ◽

Hu Jianping

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Power Content

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Design of a Low-Power Content-Addressable Memory Using Double-Feedback Match-Line Sense Amplifiers

Advances in Mechanical and Electronic Engineering - Lecture Notes in Electrical Engineering ◽

10.1007/978-3-642-31528-2_68 ◽

2013 ◽

pp. 433-438 ◽

Cited By ~ 1

Author(s):

Meng-Chou Chang ◽

Ming-Hsun Hsieh ◽

Shih-Ju Tsai

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Power Content ◽

Sense Amplifiers

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Low-power content addressable memory design using two-layer P-N match-line control and sensing

Integration ◽

10.1016/j.vlsi.2020.06.001 ◽

2020 ◽

Vol 75 ◽

pp. 73-84

Author(s):

Sheikh Wasmir Hussain ◽

Telajala Venkata Mahendra ◽

Sandeep Mishra ◽

Anup Dandapat

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Memory Design ◽

Power Content

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Low-power content-addressable memory design using a double match-line (DML) architecture

2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2013.6674676 ◽

2013 ◽

Author(s):

Ya-Chun Lin ◽

Yen-Jen Chang ◽

Tung-Chi Wu

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Memory Design ◽

Power Content

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A Low Power Content Addressable Memory Using Low Swing Search Lines

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2011.2158703 ◽

2011 ◽

Vol 58 (12) ◽

pp. 2849-2858 ◽

Cited By ~ 33

Author(s):

Byung-Do Yang ◽

Yong-Kyu Lee ◽

Si-Woo Sung ◽

Jae-Joong Min ◽

Jae-Mun Oh ◽

...

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Power Content

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Static divided word matching line for low-power Content Addressable Memory design

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1329350 ◽

2004 ◽

Cited By ~ 2

Author(s):

Kuo-Hsing Cheng ◽

Chia-Hung Wei ◽

Shu-Yu Jiang

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Memory Design ◽

Power Content

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A Low-Power Content-Addressable Memory (CAM) using Pipelined Search Scheme

Technological Developments in Networking, Education and Automation ◽

10.1007/978-90-481-9151-2_71 ◽

2010 ◽

pp. 405-410

Author(s):

Yibo Song ◽

Zheng Yao ◽

Xingguo Xiong

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Power Content

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A high speed and low power content-addressable memory(CAM) using pipelined scheme

2015 28th IEEE International System-on-Chip Conference (SOCC) ◽

10.1109/socc.2015.7406979 ◽

2015 ◽

Cited By ~ 1

Author(s):

Shixiong Jiang ◽

Pengzhan Yan ◽

Ramalingam Sridhar

Keyword(s):

Low Power ◽

High Speed ◽

Content Addressable Memory ◽

Power Content

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A Novel Match-line Charging Control Scheme with a New Sense Amplifier for High-Speed and Low-Power Content-Addressable Memory

10.7567/ssdm.2008.p-5-9 ◽

2008 ◽

Author(s):

M. Hasan ◽

T. Rahman ◽

N. Hasan ◽

A. B. M. H. Rashid ◽

A. R. Patwary

Keyword(s):

Low Power ◽

High Speed ◽

Content Addressable Memory ◽

Sense Amplifier ◽

Control Scheme ◽

Charging Control ◽

Power Content

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A low power content addressable memory with self-control mechanism and segmented matchlines

2017 International Conference on Energy, Communication, Data Analytics and Soft Computing (ICECDS) ◽

10.1109/icecds.2017.8389837 ◽

2017 ◽

Author(s):

Sethuleksmi Raju ◽

Naveen Jacob

Keyword(s):

Low Power ◽

Control Mechanism ◽

Self Control ◽

Content Addressable Memory ◽

Power Content

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