Cascoded GaN half-bridge with 17-MHz wide-band galvanically isolated current sensor

A cascoded GaN half-bridge with wide-band galvanically isolated current sensor is proposed. A 650-V depletion-mode GaN FET is switched by a low-propagation-delay gate driver in active-mode. The standby and active modes are switched by a 25-V N-ch LDMOS. The current sensor uses the LDMOS as a shunt resistor, gm-cell-based sense amplifier and mixer based isolation amplifier for wider bandwidth. PVT variations of on-resistance of the current-detecting MOSFET are compensated using a reference MOSFET. A digital calibration loop across the isolation is formed to keep the current sensor gain constant within ±1.5% across the whole temperature range. The wide-band current sensor can measure power device switching current. In this study, a cascoded GaN half-bridge switching and inductor current sensing using low-side and high-side device current are demonstrated. The proposed techniques show the possibility of implementing a GaN half-bridge module with isolated current sensor in a package.

Modeling of Statistical Variation Effects on DRAM Sense Amplifier Offset Voltage

With the downscaling in device sizes, process-induced parameter variation has emerged as one of the most serious problems. In particular, the parameter fluctuation of the dynamic random access memory (DRAM) sense amplifiers causes an offset voltage, leading to sensing failure. Previous studies indicate that the threshold voltage mismatch between the paired transistors of a sense amplifier is the most critical factor. In this study, virtual wafers were generated, including statistical VT variation. Then, we numerically investigate the prediction accuracy and reliability of the offset voltage of DRAM wafers using test point measurement for the first time. We expect that this study will be helpful in strengthening the in-line controllability of wafers to secure the DRAM sensing margin.

Comparative Analysis in Terms of Power and Delay of the Different Sense Amplifier Topologies

To read the data from the memory in each of the devices is crucial. In the modern-day VLSI, world need high-speed devices to satisfy the demand for application such as the Internet of Things (IoT) and System on Chip (Soc). We have implemented the different types of existing sense amplifiers to investigate the working and application point of view. Every sense amplifier has its own advantage. Each of the sense amplifiers is focusing basically on the charging and discharging of Bit Line (BL), Bit Line Bar (BLB) in case of Voltage sense and Data Line (DL), Data Line Bar (DLB) in case of current sense. The waveform of the Voltage sense and current sense clearly shown. Performance comparison based on Sensing Delay, Power, and Supply variation at UMC 65nm CMOS technology node using CADENCE Virtuoso tool.