Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
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Published By Springer Berlin Heidelberg

9783540744412, 9783540744429

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The Design and Implementation of a Power Efficient Embedded SRAM

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_9 ◽

2007 ◽

pp. 86-96

Author(s):

Yijun Liu ◽

Pinghua Chen ◽

Wenyan Wang ◽

Zhenkun Li

Keyword(s):

Power Efficient ◽

Design And Implementation ◽

Embedded Sram

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Statistical Static Timing Analysis: A New Approach to Deal with Increased Process Variability in Advanced Nanometer Technologies

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_57 ◽

2007 ◽

pp. 577-577

Author(s):

D. Pandini

Keyword(s):

Timing Analysis ◽

Static Timing Analysis ◽

Process Variability ◽

New Approach ◽

Static Timing ◽

Statistical Static Timing Analysis

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Design Methodology and Software Tool for Estimation of Multi-level Instruction Cache Memory Miss Rate

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_49 ◽

2007 ◽

pp. 505-515

Author(s):

N. Kroupis ◽

D. Soudris

Keyword(s):

Design Methodology ◽

Software Tool ◽

Cache Memory ◽

Instruction Cache ◽

Multi Level

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A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_50 ◽

2007 ◽

pp. 516-525 ◽

Cited By ~ 2

Author(s):

Francesco Centurelli ◽

Luca Giancane ◽

Mauro Olivieri ◽

Giuseppe Scotti ◽

Alessandro Trifiletti

Keyword(s):

Monte Carlo Simulation ◽

Monte Carlo ◽

Statistical Model ◽

Logic Gates ◽

On Chip

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Static Power Consumption in CMOS Gates Using Independent Bodies

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_39 ◽

2007 ◽

pp. 404-412

Author(s):

D. Guerrero ◽

A. Millan ◽

J. Juan ◽

M. J. Bellido ◽

P. Ruiz-de-Clavijo ◽

...

Keyword(s):

Power Consumption ◽

Static Power

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Design and Test of Self-checking Asynchronous Control Circuit

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_31 ◽

2007 ◽

pp. 320-329 ◽

Cited By ~ 1

Author(s):

Jian Ruan ◽

Zhiying Wang ◽

Kui Dai ◽

Yong Li

Keyword(s):

Control Circuit ◽

Asynchronous Control

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Settling Time Minimization of Operational Amplifiers

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_11 ◽

2007 ◽

pp. 107-116 ◽

Cited By ~ 8

Author(s):

Andrea Pugliese ◽

Gregorio Cappuccino ◽

Giuseppe Cocorullo

Keyword(s):

Settling Time ◽

Operational Amplifiers ◽

Time Minimization

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Logic Style Comparison for Ultra Low Power Operation in 65nm Technology

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_18 ◽

2007 ◽

pp. 181-190 ◽

Cited By ~ 3

Author(s):

Mandeep Singh ◽

Christophe Giacomotto ◽

Bart Zeydel ◽

Vojin Oklobdzija

Keyword(s):

Low Power ◽

Ultra Low Power ◽

Power Operation

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Soft Error-Aware Power Optimization Using Gate Sizing

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_25 ◽

2007 ◽

pp. 255-267 ◽

Cited By ~ 2

Author(s):

Foad Dabiri ◽

Ani Nahapetian ◽

Miodrag Potkonjak ◽

Majid Sarrafzadeh

Keyword(s):

Power Optimization ◽

Soft Error ◽

Gate Sizing

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Low-Power Digital Filtering Based on the Logarithmic Number System

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/978-3-540-74442-9_53 ◽

2007 ◽

pp. 546-555 ◽

Cited By ~ 9

Author(s):

Ch. Basetas ◽

I. Kouretas ◽

V. Paliouras

Keyword(s):

Low Power ◽

Digital Filtering ◽

Number System ◽

Logarithmic Number System ◽

Logarithmic Number

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Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and SimulationLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

The Design and Implementation of a Power Efficient Embedded SRAM

Statistical Static Timing Analysis: A New Approach to Deal with Increased Process Variability in Advanced Nanometer Technologies

Design Methodology and Software Tool for Estimation of Multi-level Instruction Cache Memory Miss Rate

A Statistical Model of Logic Gates for Monte Carlo Simulation Including On-Chip Variations

Static Power Consumption in CMOS Gates Using Independent Bodies

Design and Test of Self-checking Asynchronous Control Circuit

Settling Time Minimization of Operational Amplifiers

Logic Style Comparison for Ultra Low Power Operation in 65nm Technology

Soft Error-Aware Power Optimization Using Gate Sizing

Low-Power Digital Filtering Based on the Logarithmic Number System

Lecture Notes in Computer Science - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Latest Publications