A Very Fast and Quasi-accurate Power-State-Based System-Level Power Modeling Methodology

2012 ◽  
pp. 37-49 ◽  
Author(s):  
Yang Xu ◽  
Rafael Rosales ◽  
Bo Wang ◽  
Martin Streubühr ◽  
Ralph Hasholzner ◽  
...  
Keyword(s):  
System Level ◽  
Power Modeling ◽  
Modeling Methodology

scholarly journals Multi-Level Modeling Methodology for Optimal Design of Electric Machines Based on Multi-Disciplinary Design Optimization

Energies ◽  
2019 ◽  
Vol 12 (21) ◽  
pp. 4173
Author(s):  
Zehua Dai ◽  
Li Wang ◽  
Lexuan Meng ◽  
Shanshui Yang ◽  
Ling Mao
Keyword(s):  
Power Systems ◽  
Design Optimization ◽  
Synchronous Generator ◽  
Electric Machines ◽  
Modeling Method ◽  
System Level ◽  
Superior Performance ◽  
Efficient Design ◽  
Modeling Methodology ◽  
Multi Level

The transportation sector is undergoing electrification to gain advantages such as lighter weight, improved reliability, and enhanced efficiency. As contributors to the safety of embedded critical functions in electrified systems, better sizing of electric machines in vehicles is required to reduce the cost, volume, and weight. Although the designs of machines are widely investigated, existing studies are mostly complicated and application-specific. To satisfy the multi-level design requirements of power systems, this study aims to develop an efficient modeling method of electric machines with a background of aircraft applications. A variable-speed variable-frequency (VSVF) electrically excited synchronous generator is selected as a case study to illustrate the modular multi-physics modeling process, in which weight and power loss are the major optimization goals. In addition, multi-disciplinary design optimization (MDO) methods are introduced to facilitate the optimal variable selection and simplified model establishment, which can be used for the system-level overall design. Several cases with industrial data are analyzed to demonstrate the effectiveness and superior performance of the modeling method. The results show that the proposed practices provide designers with accurate, fast, and systematic means to develop models for the efficient design of aircraft power systems.

PMCC: Fast and Accurate System-Level Power Modeling for Processors on Heterogeneous SoC

2017 ◽  
Vol 64 (5) ◽  
pp. 540-544 ◽  
Author(s):  
Chenchen Deng ◽  
Leibo Liu ◽  
Yang Liu ◽  
Shouyi Yin ◽  
Shaojun Wei
Keyword(s):  
System Level ◽  
Power Modeling

scholarly journals Learning-Based, Fine-Grain Power Modeling of System-Level Hardware IPs

2018 ◽  
Vol 23 (3) ◽  
pp. 1-25 ◽  
Author(s):  
Dongwook Lee ◽  
Andreas Gerstlauer
Keyword(s):  
System Level ◽  
Power Modeling ◽  
Fine Grain

scholarly journals System Level Modeling Methodology of Application Specific Instruction Set Processor (SIP) Using SystemC

1970 ◽  
Vol 7 (1) ◽  
pp. 44-49 ◽  
Author(s):  
Rana Mukherji ◽  
Manishita Das
Keyword(s):  
System Integration ◽  
Speech Synthesis ◽  
System Level ◽  
Instruction Set ◽  
Specific Instruction ◽  
Modeling Methodology ◽  
Hardware Description ◽  
Natural Solution ◽  
Description Languages ◽  
Application Specific

In recent years, the development of application specific instruction set processors (ASIP) is the exclusive domain of the semiconductor houses and core vendors. This is due to the fact that constructing such architecture is a difficult assignment that needs skilled knowledge in distinct domains: application software development tools, processor hardware implementation, and system integration and verification. To specify the design and implementation of such systems and incorporate the functionality implemented in both hardware and software forms, we are compelled to move on from traditional Hardware Description Languages (HDLs). Since C and C++ are dominant languages used by chip architects, system engineers and software engineers today, we believe that a C++ based approach to hardware modeling is necessary. This will enable codesign, providing a more natural solution to partitioning fuctionality between hardware and software. In this paper, we discuss a design approach of SystemC (a C++ class library) for ASIP at the system-level which provides necessary features for modeling design hierarchy, concurrency and reactivity in hardware. To exemplify and validate the method we employed it to the design of a 32-bit ASIP for Hindi Text-to-Speech Synthesis developed by CEERI, Pilani (INDIA). Keywords: ASIP; System; System Level Design   DOI: http://dx.doi.org/10.3329/diujst.v7i1.9647 Daffodil International University Journal of Science and Technology Vol.7(1) 2012 44-49

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