A 12-bit 80 MS/s 2 mW SAR ADC with Deliberated Digital Calibration and Redundancy Schemes for Medical Imaging

Author(s):  
Gang Han ◽  
Bin Wu ◽  
Yilin Pu
Author(s):  
Masato Yoshioka ◽  
Kiyoshi Ishikawa ◽  
Takeshi Takayama ◽  
Sanroku Tsukamoto
Keyword(s):  
Sar Adc ◽  

2018 ◽  
Vol 13 (3) ◽  
pp. 1-8
Author(s):  
Felipe Makara ◽  
Lucas Mangini da Silva ◽  
Luis Henrique Assumpção Lolis ◽  
Andre Mariano

In this paper, an energy-efficient SAR ADC for IoT applications is presented. The proposed ADC relies on a built-in calibration circuit to improve accuracy and introduces an original DAC that merges the concepts of binary-weighted and C/2C arrays in order to achieve a favorable trade-off between area, accuracy and power consumption. The system consumes 58 µW per conversion cycle sampling at a frequency of 6.66 MHz with an SNDR of 49.78 dB for a 1MHz input signal. With an ENOB of 8 bits, the resulting FOM is 34fJ/conversion-step.


2015 ◽  
Vol 12 (4) ◽  
pp. 20150001-20150001
Author(s):  
Yawei Guo ◽  
Yue Wu ◽  
Dongdong Guo ◽  
Xu Cheng ◽  
Zhiyi Yu ◽  
...  

2021 ◽  
Vol 1914 (1) ◽  
pp. 012032
Author(s):  
Wenxin Yu ◽  
Yunqiang Hao ◽  
Dongbai Yi ◽  
Jianxiong Xi ◽  
Xiaowei Zhang ◽  
...  
Keyword(s):  
Sar Adc ◽  

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