RAPAC: a high-speed image-processing system

1987 ◽  
Vol 11 (3) ◽  
pp. 166
2003 ◽  
Author(s):  
Kohtaro Ohba ◽  
Jesus C. P. Ortega ◽  
Tamio Tanikawa ◽  
Kazuo Tanie ◽  
Kenji Tajima ◽  
...  

1987 ◽  
Vol 134 (1) ◽  
pp. 39 ◽  
Author(s):  
A.C. Elphinstone ◽  
A.P. Heron ◽  
G.S. Hobson ◽  
A. Houghton ◽  
M.K. Lau ◽  
...  

2012 ◽  
Vol 443-444 ◽  
pp. 71-76
Author(s):  
Lei Chen ◽  
Xiao Yan Tian ◽  
Jiao Pang

High speed image processing has a dilemma of that software-based approach lock real-time property while hardware-based approach has high modeling complexity. In order to solve above problem, this paper adopted the technical solution of Modelsim co-simulation with foreign language interface (FLI). Co-simulation technology, combining with rail sections image processing system as simulation platform, comprehensive using C language’s high flexibility in data processing , Modelsim’s high reliability in simulate FPGA, and take use of dynamic partially allocation methods, heavy effectively reduced the complexity of image processing system and storage space. Practice proves, this means provide a reliable basis for scheme verification of FPGA image processing system.


Sign in / Sign up

Export Citation Format

Share Document