In-depth FPGA Accelerator Performance Evaluation with Single Node Benchmarks from the HPC Challenge Benchmark Suite for Intel and Xilinx FPGAs using OpenCL

Author(s):  
Marius Meyer ◽  
Tobias Kenter ◽  
Christian Plessl
Author(s):  
Khaldoon Moosa Mhaidat ◽  
Ahmad Baset ◽  
Osama Al-Khaleel

OpenSPARC is the only 64-bit Chip Multi-Threaded (CMT) processor that has ever been made open-source and non-proprietary. In this paper, the authors present an FPGA-based embedded system and methodology for prototyping and validating the OpenSPARC processor. They also present synthesis and performance evaluation results for OpenSPARC on a Virtex-5 FPGA platform. Light version of OpenSolaris was successfully booted on the platform, and the High Performance Embedded Computing (HPEC) benchmark suite was used to evaluate the performance. Xilinx ISE suite was used for synthesis, implementation, and chip programming. The down-scaled FPGA implementation of the processor runs at 81.3 MHz. The whole processor would require about 176453 Virtex-5 logic slices. To the best of their knowledge, they are the first researchers to report detailed FPGA synthesis results for OpenSPARC and evaluate its performance on FPGA using the HPEC benchmarks. Other researchers may find these results useful when comparing with other processors or studying the impact of a certain design change or addition on performance and cost.


Author(s):  
Masahiro Nakao ◽  
Hitoshi Murai

AbstractThis chapter describes the implementation and performance evaluation of Omni compiler, which is a reference implementation of the compiler for XcalableMP. For performance evaluation, this chapter also presents how to implement the HPC Challenge benchmarks, which is a benchmark suite for an HPC parallel language. The results show that the performance of XMP is comparable to that of MPI in many cases.


Author(s):  
Carl Malings ◽  
Rebecca Tanzer ◽  
Aliaksei Hauryliuk ◽  
Provat K. Saha ◽  
Allen L. Robinson ◽  
...  

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