A low-power True Single Phase Clock scan cell design for VLSI testing

Author(s):  
A. Arulmurgan ◽  
V.R. Roobiha ◽  
G. Narendran ◽  
K. Praneshkumar ◽  
C. Gokul
2017 ◽  
Vol 14 (8) ◽  
pp. 20170065-20170065
Author(s):  
Xincun Ji ◽  
Xiaojuan Xia ◽  
Zixuan Wang ◽  
Leisheng Jin
Keyword(s):  

2010 ◽  
Vol 57 (1) ◽  
pp. 72-82 ◽  
Author(s):  
M.V. Krishna ◽  
Manh Anh Do ◽  
Kiat Seng Yeo ◽  
Chirn Chye Boon ◽  
Wei Meng Lim

2017 ◽  
Vol 14 (1) ◽  
pp. 20160446-20160446 ◽  
Author(s):  
Wenjian Jiang ◽  
Fengqi Yu ◽  
Qinjin Huang

Author(s):  
Vamshi Krishna Manthena ◽  
Manh Anh Do ◽  
Chirn Chye Boon ◽  
Kiat Seng Yeo
Keyword(s):  

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