A low-power high-speed 32/33 prescaler based on novel divide-by-4/5 unit with improved true single-phase clock logic

2015 ◽  
Author(s):  
Song Jia ◽  
Shilin Yan ◽  
Yuan Wang ◽  
Ganggang Zhang
Keyword(s):  
Low Power ◽  
High Speed ◽  
Single Phase ◽  
Phase Clock

scholarly journals A low-power high-speed true single-phase clock-based divide-by-2/3 prescaler

2017 ◽  
Vol 14 (1) ◽  
pp. 20160446-20160446 ◽  
Author(s):  
Wenjian Jiang ◽  
Fengqi Yu ◽  
Qinjin Huang
Keyword(s):  
Low Power ◽  
High Speed ◽  
Single Phase ◽  
Phase Clock

scholarly journals High-Speed Wide-Range True-Single-Phase-Clock CMOS Dual Modulus Prescaler

Electronics ◽  
2020 ◽  
Vol 9 (5) ◽  
pp. 725
Author(s):  
Xiaoran Li ◽  
Jian Gao ◽  
Zhiming Chen ◽  
Xinghua Wang
Keyword(s):  
Low Power ◽  
High Speed ◽  
Single Phase ◽  
Logic Gates ◽  
Cmos Technology ◽  
Propagation Delay ◽  
Operating Frequency ◽  
Wide Range ◽  
Measurement Results ◽  
Phase Clock

This manuscript presents two novel low-power high-speed true-single-phase-clock (TSPC) prescalers with division ratios of 2/3 and 4/5, respectively, in a standard 90-nm CMOS technology. The logic gates incorporated between the D-flip-flops (DFFs) of a conventional 2/3 prescaler are modified to reduce the propagation delay and hence increase the maximum operating frequency. The measurement results show that the proposed divide-by-2/3 and divide-by-4/5 prescalers can operate up to 17 GHz and 15.3 GHz, respectively, which increase by 5.4 GHz and 4.3 GHz compared with conventional TSPC prescalers. The power of the proposed divide-by-2/3 prescaler is 0.67 mW and 0.92 mW, and 0.87 mW and 1.06 mW for the proposed divide-by-4/5 prescaler. The chip occupies an area of 20 × 35 μm2 and 20 × 50 μm2 for the proposed divide-by-2/3 and divide-by-4/5 prescalers.

scholarly journals A low-power high-speed true single phase clock divide-by-2/3 prescaler

2013 ◽  
Vol 10 (2) ◽  
pp. 20120913-20120913 ◽  
Author(s):  
Jianhui Wu ◽  
Zixuan Wang ◽  
Xincun Ji ◽  
Cheng Huang
Keyword(s):  
Low Power ◽  
High Speed ◽  
Single Phase ◽  
Phase Clock

scholarly journals A 2.4 GHz fractional-N PLL with a low-power true single-phase clock prescaler

2017 ◽  
Vol 14 (8) ◽  
pp. 20170065-20170065
Author(s):  
Xincun Ji ◽  
Xiaojuan Xia ◽  
Zixuan Wang ◽  
Leisheng Jin
Keyword(s):  
Low Power ◽  
Single Phase ◽  
Phase Clock

scholarly journals Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler

2010 ◽  
Vol 57 (1) ◽  
pp. 72-82 ◽  
Author(s):  
M.V. Krishna ◽  
Manh Anh Do ◽  
Kiat Seng Yeo ◽  
Chirn Chye Boon ◽  
Wei Meng Lim
Keyword(s):  
Low Power ◽  
Single Phase ◽  
Ultra Low Power ◽  
Phase Clock
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