Minimized program disturb for vertically stacked junctionless charge-trapping flash memory devices by adopting in-situ doped poly-silicon channel

2015 ◽  
Vol 147 ◽  
pp. 5-9
Author(s):  
Hsin-Kai Fang ◽  
Kuei-Shu Chang-Liao ◽  
Chun-Yuan Chen ◽  
Po-Hao Chen ◽  
Dong-Yan Li ◽  
...  
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Devices ◽  
Poly Silicon

Physical and electrical properties of flash memory devices with nickel oxide(NiO 2 ) charge trapping layer

Vacuum ◽  
2017 ◽  
Vol 140 ◽  
pp. 47-52 ◽  
Author(s):  
Ming Ling Lee ◽  
Hsiang Chen ◽  
Chyuan Haur Kao ◽  
Rama Krushna Mahanty ◽  
Wei Kung Sung ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Nickel Oxide ◽  
Flash Memory ◽  
Charge Trapping ◽  
Memory Devices

Operation characteristics of Poly-Si nanowire charge-trapping flash memory devices with SiGe and Ge buried channels

Vacuum ◽  
2017 ◽  
Vol 140 ◽  
pp. 53-57 ◽  
Author(s):  
Hsin-Kai Fang ◽  
Kuei-Shu Chang-Liao ◽  
Chien-Pang Huang ◽  
Wei-Zhi Lee
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Devices ◽  
Si Nanowire ◽  
Buried Channels ◽  
Operation Characteristics

Ge Surface Channel Formed by Different Temperature Processes on Characteristics of Poly-Si Charge-Trapping Flash Memory Devices

2018 ◽  
Author(s):  
C.C. Su ◽  
K.S. Chang-Liao ◽  
H.K. Fang ◽  
Y.C. Yu ◽  
W.H. Huang ◽  
...  
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Devices

Impacts of Low Temperature formed SiO2 Tunneling and Si3N4/HfO2 Trapping Layers on Gate-All-Around Charge-Trapping Flash Memory Devices

2017 ◽  
Author(s):  
P.-Y. Lin ◽  
K.-S. Chang-Liao ◽  
H.-K. Fang ◽  
C.-H. Cheng ◽  
W.-H. Huang ◽  
...  
Keyword(s):  
Low Temperature ◽  
Flash Memory ◽  
Charge Trapping ◽  
Memory Devices
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