Design of a compact reversible fault tolerant field programmable gate array: A novel approach in reversible logic synthesis

2013 ◽  
Vol 44 (6) ◽  
pp. 519-537 ◽  
Author(s):  
Md. Shamsujjoha ◽  
Hafiz Md. Hasan Babu ◽  
Lafifa Jamal

Steganography is one of the commanding and commonly used methods for embedding data. Realizing steganography in hardware supports to speed up steganography. This work realizesthe novel approach for generation of Key, for hiding and encoding processes of image steganography using LSB and HAAR DWT.The data embedding process is realized with seven segment display pattern as a secret key with various sizes using HAAR DWT and LSB. Maximum hiding effectiveness is also attained from this work. The same is implemented in hardware using reconfigurable device Field programmable gate array to improve the speed, area and power. The proposed work is also evaluated improved PSNR using MATLAB.


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