Design techniques of all‐digital arithmetic units for time‐mode signal processing

2018 ◽  
Vol 12 (6) ◽  
pp. 753-763
Author(s):  
Fei Yuan
Keyword(s):  
Signal Processing ◽  
Digital Arithmetic ◽  
Arithmetic Units ◽  
Design Techniques

GaAs digital arithmetic subsystem for high data-rate signal processing

2003 ◽  
Author(s):  
J.A. Irvine ◽  
G.E. Gorder ◽  
H.P. Singh ◽  
R.A. Sadler
Keyword(s):  
Signal Processing ◽  
Data Rate ◽  
High Data Rate ◽  
High Data ◽  
Digital Arithmetic

Digital arithmetic units for a high data rate

1975 ◽  
Vol 45 (3) ◽  
pp. 116 ◽  
Author(s):  
P.M. Thompson ◽  
A. Bélanger
Keyword(s):  
Data Rate ◽  
High Data Rate ◽  
High Data ◽  
Digital Arithmetic ◽  
Arithmetic Units

scholarly journals High Speed RADIX-2 Butterfly Structure Using Novel Wallace Multiplier

2018 ◽  
Vol 7 (3.4) ◽  
pp. 213
Author(s):  
Garima Thakur ◽  
Harsh Sohal ◽  
Shruti Jain
Keyword(s):  
Signal Processing ◽  
Fourier Transform ◽  
Fast Fourier Transform ◽  
High Speed ◽  
Arithmetic Units

In Signal Processing applications the arithmetic units mainly consists of adders and multipliers. These arithmetic units are used in to enhance the performance of Fast Fourier Transform (FFT) Butterfly structure implementation. This paper discusses the addition and multiplication algorithms for parameters like speed, area and power. The best suited among all adders are Kogge Stone Adder (KSA) while among multipliers are Wallace multiplier(WM) which is used for the implementation of the FFT structure. Verilog coding is used for implementation of circuit and the tool used is Xilinx ISE 14.1 Design suite. 

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