scholarly journals A Reliable Low Power Multiplier Using Fixed Width Scalable Approximation

2021 ◽  
Vol 2070 (1) ◽  
pp. 012135
Author(s):  
K Stella ◽  
T Vinith ◽  
K Sriram ◽  
P Vignesh
Keyword(s):  
Time Delay ◽  
Low Power ◽  
Approximate Computing ◽  
Information Mining ◽  
Information Handling ◽  
Proposed Model ◽  
Satisfactory Precision ◽  
Enormous Number ◽  
Low Power Multiplier

Abstract Recent Approximate computing is a change in perspective in energy-effective frameworks plan and activity, in light of the possibility that we are upsetting PC frameworks effectiveness by requesting a lot of precision from them. Curiously, enormous number of utilization areas, like DSP, insights, and AI. Surmised figuring is appropriate for proficient information handling and mistake strong applications, for example, sign and picture preparing, PC vision, AI, information mining and so forth Inexact registering circuits are considered as a promising answer for lessen the force utilization in inserted information preparing. This paper proposes a FPGA execution for a rough multiplier dependent on specific partial part-based truncation multiplier circuits. The presentation of the proposed multiplier is assessed by contrasting the force utilization, the precision of calculation, and the time delay with those of a rough multiplier dependent on definite calculation introduced. The estimated configuration acquired energy effective mode with satisfactory precision. When contrasted with ordinary direct truncation proposed model fundamentally impacts the presentation. Thusly, this novel energy proficient adjusting based inexact multiplier design outflanked another cutthroat model.

LPQ-SAM: A Low-Power Quality Scalable Approximate Multiplier

2020 ◽  
pp. 2150017
Author(s):  
Sumbal Iqbal ◽  
Osman Hasan ◽  
Rehan Hafiz ◽  
Zeshan Aslam Khan
Keyword(s):  
Low Power ◽  
Power Quality ◽  
Computational Effort ◽  
Power Reduction ◽  
Approximate Computing ◽  
Error Resilient ◽  
Error Metrics ◽  
And Performance ◽  
Real Time Application ◽  
Low Power Multiplier

Approximate computing allows compromising accuracy to attain energy and performance efficient designs. However, the accuracy requirements of many applications change on runtime and it has been often observed that traditional approximate hardware tends to either provide unacceptable results or leads to an unnecessary computational effort. Quality scalable configurations can overcome these limitations. With the same motivation, we propose a low-power quality scalable approximate multiplier (LPQ-SAM) in this paper. This low power multiplier has various accuracy reconfigurable modes, including an accurate one and thus, it can be used for both error-resilient and exact applications. LPQ-SAM is exhaustively tested for different error metrics and it has been observed that in the approximate mode, it provides up to 19% and 55% power reduction compared to the exact Booth and Wallace multipliers, respectively. For illustration purposes, we demonstrated the effectiveness of LPQ-SAM on a real-time application, i.e., image masking.

scholarly journals A Low Power Multiplier using a 24-Transistor Latch Adder

2015 ◽  
Vol 8 (19) ◽  
Author(s):  
Savio Victor Gomes ◽  
P. Sasipriya ◽  
V. S. Kanchana Bhaaskaran
Keyword(s):  
Low Power ◽  
Low Power Multiplier

scholarly journals SEIRS model for virus spreading with time delay

2018 ◽  
Vol 173 ◽  
pp. 02042
Author(s):  
Shi-wei Lu ◽  
Gang Wang ◽  
Tong-rui Chen ◽  
Run-nian Ma
Keyword(s):  
Time Delay ◽  
System Dynamics ◽  
Stable Condition ◽  
The State ◽  
Node Degree ◽  
Hurwitz Stability ◽  
Proposed Model ◽  
Virus Spreading ◽  
Infection Stage

In view of the latent characteristic of virus, the escaped state is considered in the model of virus spreading and employed to describe the state of nodes that are infected but not activated. A novelSusceptible–Escaped–Infected–Removed–Susceptible (SEIRS) model with delay is presented for virus spreading based on the escaped mechanism. In the proposed model, time delay, as an important factor, is considered in the infection stage, as well as the node degree of network. Thereafter, system dynamics equations are derived for the model, and the stable condition of the system is investigated via the criterion of Routh-Hurwitz stability. Finally, simulations are demonstrated to illustrate the proposedmodel and its performance.

scholarly journals Accurate Sampling with Noisy Forces from Approximate Computing

Computation ◽  
2020 ◽  
Vol 8 (2) ◽  
pp. 39 ◽  
Author(s):  
Varadarajan Rengaraj ◽  
Michael Lass ◽  
Christian Plessl ◽  
Thomas D. Kühne
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Computer Simulations ◽  
High Efficiency ◽  
Type Equation ◽  
Low Power Consumption ◽  
Approximate Computing ◽  
Expectation Values ◽  
Computing Paradigm ◽  
Custom Hardware

In scientific computing, the acceleration of atomistic computer simulations by means of custom hardware is finding ever-growing application. A major limitation, however, is that the high efficiency in terms of performance and low power consumption entails the massive usage of low precision computing units. Here, based on the approximate computing paradigm, we present an algorithmic method to compensate for numerical inaccuracies due to low accuracy arithmetic operations rigorously, yet still obtaining exact expectation values using a properly modified Langevin-type equation.

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