A minimal universal test set for self-test of EXOR-Sum-of-Products circuits

IEEE Transactions on Computers ◽

10.1109/12.841130 ◽

2000 ◽

Vol 49 (3) ◽

pp. 267-276 ◽

Author(s):

U. Kalay ◽

D.V. Hall ◽

M.A. Perkowski

Keyword(s):

Test Set ◽

Universal Test ◽

Sum Of Products ◽

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Correction to "A minimum universal test set for self-test of EXOR-sum-of-products circuits"

IEEE Transactions on Computers ◽

10.1109/tc.2000.859544 ◽

2000 ◽

Vol 49 (5) ◽

pp. 525-525

Keyword(s):

Test Set ◽

Universal Test ◽

Sum Of Products ◽

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DFT with Universal Test Set for All Missing Gate Faults in Reversible Circuits

Journal of Circuits System and Computers ◽

10.1142/s0218126622501286 ◽

2021 ◽

Author(s):

Joyati Mondal ◽

Dipak Kumar Kole ◽

Hafizur Rahaman ◽

Debesh Kumar Das ◽

Bhargab B. Bhattacharya

Keyword(s):

Test Set ◽

Universal Test ◽

Reversible Circuits

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Universal test set for bridging fault detection in reversible circuit

2008 3rd International Design and Test Workshop ◽

10.1109/idt.2008.4802464 ◽

2008 ◽

Author(s):

Pradyut Sarkar ◽

Susanta Chakrabarti

Keyword(s):

Fault Detection ◽

Test Set ◽

Universal Test ◽

Reversible Circuit ◽

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Universal test set generation for CMOS circuits

Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) ATS-93 ◽

10.1109/ats.1993.398765 ◽

2002 ◽

Author(s):

B. Chen ◽

C.L. Lee

Keyword(s):

Cmos Circuits ◽

Test Set ◽

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Universal Test Controller Chip for Board Self Test

Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems - Informatik-Fachberichte ◽

10.1007/978-3-642-45628-2_15 ◽

1987 ◽

pp. 165-175

Author(s):

Andrzej Hławiczka ◽

Dariusz Badura

Keyword(s):

Universal Test ◽

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A universal test set for CMOS circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.3197 ◽

1988 ◽

Vol 7 (5) ◽

pp. 590-597 ◽

Author(s):

G. Gupta ◽

N.K. Jha

Keyword(s):

Cmos Circuits ◽

Test Set ◽

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Universal test set for detecting stuck-at and bridging faults in double fixed-polarity Reed–Muller programmable logic arrays

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:20050079 ◽

2006 ◽

Vol 153 (2) ◽

pp. 109 ◽

Author(s):

H. Rahaman ◽

D.K. Das

Keyword(s):

Programmable Logic ◽

Bridging Faults ◽

Programmable Logic Arrays ◽

Test Set ◽

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Synthesis of reversible circuits for testing with universal test set and C-testability of reversible iterative logic arrays

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design ◽

10.1109/icvd.2005.158 ◽

2005 ◽

Author(s):

A. Chakraborty

Keyword(s):

Test Set ◽

Universal Test ◽

Reversible Circuits

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Test set embedding in a built-in self-test environment

10.1109/test.1989.82306 ◽

2003 ◽

Author(s):

S.B. Akers ◽

W. Jansz

Keyword(s):

Test Environment ◽

Test Set ◽

Self Test ◽

Built In Self Test

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Design verification by test vectors and arithmetic transform Universal Test Set

IEEE Transactions on Computers ◽

10.1109/tc.2004.1275301 ◽

2004 ◽

Vol 53 (5) ◽

pp. 628-640 ◽

Author(s):

K. Radecka ◽

Z. Zilic

Keyword(s):

Design Verification ◽

Test Set ◽

Universal Test ◽

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