Computer arithmetic architectures with redundant number systems

Author(s):  
H.R. Srinivas ◽  
E.K. Parhi
2020 ◽  
Author(s):  
Tao Wu

Abstract Modular exponentiation is fundamental in computer arithmetic and is widely applied in cryptography such as ElGamal cryptography, Diffie-Hellman key exchange protocol, and RSA cryptography. Implementation of modular exponentiation in residue number system leads to high parallelism in computation, and has been applied in many hardware architectures. While most RNS based architectures utilizes RNS Montgomery algorithm with two residue number systems, the recent modular multiplication algorithm with sum-residues performs modular reduction in only one residue number system with about the same parallelism. In this work, it is shown that high-performance modular exponentiation and RSA cryptography can be implemented in RNS. Both the algorithm and architecture are improved to achieve high performance with extra area overheads, where a 1024-bit modular exponentiation can be completed in 0.567 ms in Xilinx XC6VLX195t-3 platform, costing 26,489 slices, 87,357 LUTs, 363 dedicated multipilers of $18\times 18$ bits, and 65 Block RAMs.


IEEE Access ◽  
2021 ◽  
pp. 1-1
Author(s):  
Marc Reichenbach ◽  
Johannes Knodtel ◽  
Sebastian Rachuj ◽  
Dietmar Fey

Author(s):  
Serhii Zakharchenko ◽  
Roman Humeniuk

The article is devoted to research on the possibilities to use redundant number systems for bit error notification in a successive-approximation ADC during the main conversion mode. The transfer function of a successive-approximation ADC with a non-binary radix is analyzed. If the radix is less than 2, not all possible code combinations appear on the converter output. The process of formation of unused combinations is investigated. The relationship between the bit’s deviations and the list of unused combinations is established. The possibilities of estimating the bit error value without interrupting the process of analog-to-digital conversion is considered.


2015 ◽  
Vol 5 (6(25)) ◽  
pp. 55
Author(s):  
Светлана Юрьевна Куницкая ◽  
Вера Григорьевна Бабенко ◽  
Олег Борисович Пивень

2020 ◽  
Vol 44 (2) ◽  
pp. 274-281
Author(s):  
V.M. Chernov

The paper proposes a new method of synthesis of computer arithmetic systems for "error-free" parallel calculations. The difference between the proposed approach and calculations in traditional systems of Residue Number Systems for the direct sum of modular rings is the parallelization of calculations in non-quadratic extensions of simple finite fields whose elements are represented in number systems generated by sequences of powers of roots of the characteristic polynomial of the recurrent sequence.


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