Tunable Floating-Point for Energy Efficient Accelerators

2018 IEEE 25th Symposium on Computer Arithmetic (ARITH) ◽

10.1109/arith.2018.8464797 ◽

2018 ◽

Author(s):

Alberto Nannarelli

Keyword(s):

Energy Efficient ◽

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ECIM: Exponent Computing in Memory for an Energy Efficient Heterogeneous Floating-Point DNN Training Processor

10.1109/mm.2021.3096236 ◽

2021 ◽

pp. 1-1

Author(s):

Juhyoung Lee ◽

Jihoon Kim ◽

Wooyoung Jo ◽

Sangyeob Kim ◽

Sangjin Kim ◽

...

Keyword(s):

Energy Efficient ◽

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Energy-efficient floating-point arithmetic for digital signal processors

2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) ◽

10.1109/acssc.2011.6190337 ◽

2011 ◽

Author(s):

Syed Zohaib Gilani ◽

Nam Sung Kim ◽

Michael Schulte

Keyword(s):

Energy Efficient ◽

Digital Signal ◽

Digital Signal Processors ◽

Floating Point ◽

Floating Point Arithmetic ◽

Signal Processors ◽

Point Arithmetic

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Recycled Error Bits: Energy-Efficient Architectural Support for Floating Point Accuracy

SC14: International Conference for High Performance Computing, Networking, Storage and Analysis ◽

10.1109/sc.2014.15 ◽

2014 ◽

Author(s):

Ralph Nathan ◽

Bryan Anthonio ◽

Shih-Lien Lu ◽

Helia Naeimi ◽

Daniel J. Sorin ◽

...

Keyword(s):

Energy Efficient ◽

Floating Point ◽

Architectural Support

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High performance and energy efficient single‐precision and double‐precision merged floating‐point adder on FPGA

IET Computers & Digital Techniques ◽

10.1049/iet-cdt.2016.0200 ◽

2017 ◽

Vol 12 (1) ◽

pp. 20-29 ◽

Author(s):

Hao Zhang ◽

Dongdong Chen ◽

Seok‐Bum Ko

Keyword(s):

Energy Efficient ◽

High Performance ◽

Floating Point ◽

Double Precision ◽

Single Precision

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Mantissa-Masking for Energy-Efficient Floating-Point LTE Uplink MIMO Baseband Processing

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) ◽

10.3850/9783981537079_0389 ◽

2016 ◽

Author(s):

D. Guenther ◽

T. Henriksson ◽

R. Leupers ◽

G. Ascheid

Keyword(s):

Energy Efficient ◽

Floating Point ◽

Baseband Processing ◽

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Energy-Efficient Approximate Floating-Point Multiplier Based on Radix-8 Booth Encoding

10.1109/asicon52560.2021.9620455 ◽

2021 ◽

Author(s):

Rongyu Ding ◽

Yi Guo ◽

Heming Sun ◽

Shinji Kimura

Keyword(s):

Energy Efficient ◽

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Reduced-Precision Floating-Point Formats on GPUs for High Performance and Energy Efficient Computation

2016 IEEE International Conference on Cluster Computing (CLUSTER) ◽

10.1109/cluster.2016.77 ◽

2016 ◽

Author(s):

Daichi Mukunoki ◽

Toshiyuki Imamura

Keyword(s):

Energy Efficient ◽

High Performance ◽

Floating Point ◽

Efficient Computation

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An area- and energy-efficient hybrid architecture for floating-point FFT computations

Microprocessors and Microsystems ◽

10.1016/j.micpro.2018.12.007 ◽

2019 ◽

Vol 65 ◽

pp. 14-22 ◽

Author(s):

Mingyu Wang ◽

Zhaolin Li

Keyword(s):

Energy Efficient ◽

Floating Point ◽

Hybrid Architecture

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A multi-mode energy-efficient double-precision floating-point multiplier

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2014.6908344 ◽

2014 ◽

Author(s):

Gopi Neela ◽

Jeffrey Draper

Keyword(s):

Energy Efficient ◽

Floating Point ◽

Double Precision ◽

Mode Energy ◽

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Energy efficient IEEE 754 floating point multiplier using dual spacer delay insensitive logic

Circuit World ◽

10.1108/cw-03-2017-0012 ◽

2017 ◽

Vol 43 (2) ◽

pp. 72-79 ◽

Author(s):

Sudhakar Jyothula ◽

Sushma K.

Keyword(s):

Energy Efficient ◽

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