FPGA implementation of an IIR temporal filtering technique for real-time stimulus artifact rejection

2011 IEEE Biomedical Circuits and Systems Conference (BioCAS) ◽

10.1109/biocas.2011.6107724 ◽

2011 ◽

Author(s):

Kanokwan Limnuson ◽

Hui Lu ◽

Hillel J. Chiel ◽

Pedram Mohseni

Keyword(s):

Real Time ◽

Fpga Implementation ◽

Temporal Filtering ◽

Stimulus Artifact ◽

Artifact Rejection ◽

Filtering Technique

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A bidirectional neural interface SoC with an integrated spike recorder, microstimulator, and low-power processor for real-time stimulus artifact rejection

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-015-0489-z ◽

2015 ◽

Vol 82 (2) ◽

pp. 457-470 ◽

Author(s):

Kanokwan Limnuson ◽

Hui Lu ◽

Hillel J. Chiel ◽

Pedram Mohseni

Keyword(s):

Low Power ◽

Real Time ◽

Neural Interface ◽

Stimulus Artifact ◽

Artifact Rejection

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Real-Time Stimulus Artifact Rejection Via Template Subtraction

IEEE Transactions on Biomedical Circuits and Systems ◽

10.1109/tbcas.2013.2274574 ◽

2014 ◽

Vol 8 (3) ◽

pp. 391-400 ◽

Author(s):

Kanokwan Limnuson ◽

Hui Lu ◽

Hillel J. Chiel ◽

Pedram Mohseni

Keyword(s):

Real Time ◽

Stimulus Artifact ◽

Artifact Rejection

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VLSI implementation of a template subtraction algorithm for real-time stimulus artifact rejection

2010 Annual International Conference of the IEEE Engineering in Medicine and Biology ◽

10.1109/iembs.2010.5626247 ◽

2010 ◽

Author(s):

K Limnuson ◽

Hui Lu ◽

H J Chiel ◽

P Mohseni

Keyword(s):

Real Time ◽

Vlsi Implementation ◽

Stimulus Artifact ◽

Artifact Rejection

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A bidirectional neural interface SoC with an integrated spike recorder, microstimulator, and low-power processor for real-time stimulus artifact rejection

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference ◽

10.1109/cicc.2014.6946129 ◽

2014 ◽

Author(s):

K. Limnuson ◽

H. Lu ◽

H. J. Chiel ◽

P. Mohseni

Keyword(s):

Low Power ◽

Real Time ◽

Neural Interface ◽

Stimulus Artifact ◽

Artifact Rejection

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FPGA Implementation and Evaluation of a Real-Time Image-Based Vibration Detection System with Adaptive Filtering

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.2020vlp0002 ◽

2020 ◽

Vol E103.A (12) ◽

pp. 1472-1480

Author(s):

Taito MANABE ◽

Kazuya UETSUHARA ◽

Akane TAHARA ◽

Yuichiro SHIBATA

Keyword(s):

Real Time ◽

Adaptive Filtering ◽

Detection System ◽

Fpga Implementation ◽

Vibration Detection ◽

Real Time Image ◽

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Power Converter Half-bridge Models in the Light of Real-time FPGA Implementation

2021 IEEE 19th International Power Electronics and Motion Control Conference (PEMC) ◽

10.1109/pemc48073.2021.9432622 ◽

2021 ◽

Author(s):

Saif Alsarayreh ◽

Zoltan Suto

Keyword(s):

Real Time ◽

Power Converter ◽

Fpga Implementation ◽

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Development of a temporal filtering technique for suppression of interferences in applied laser-induced fluorescence diagnostics

Applied Optics ◽

10.1364/ao.48.002373 ◽

2009 ◽

Vol 48 (12) ◽

pp. 2373 ◽

Author(s):

Andreas Ehn ◽

Billy Kaldvee ◽

Joakim Bood ◽

Marcus Aldén

Keyword(s):

Laser Induced Fluorescence ◽

Temporal Filtering ◽

Fluorescence Diagnostics ◽

Filtering Technique

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A new strategy based on feature filtering technique for improving the real-time control performance of myoelectric prostheses

Biomedical Signal Processing and Control ◽

10.1016/j.bspc.2021.102969 ◽

2021 ◽

Vol 70 ◽

pp. 102969

Author(s):

Xiangxin Li ◽

Lan Tian ◽

Yue Zheng ◽

Oluwarotimi Williams Samuel ◽

Peng Fang ◽

...

Keyword(s):

Real Time ◽

Control Performance ◽

Real Time Control ◽

The Real ◽

Myoelectric Prostheses ◽

Time Control ◽

New Strategy ◽

Feature Filtering ◽

Filtering Technique

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Online Automatic Artifact Rejection using the Real-time EEG Source-mapping Toolbox (REST)

2018 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC) ◽

10.1109/embc.2018.8512191 ◽

2018 ◽

Author(s):

Luca Pion-Tonachini ◽

Sheng-Hsiou Hsu ◽

Chi-Yuan Chang ◽

Tzyy-Ping Jung ◽

Scott Makeig

Keyword(s):

Real Time ◽

The Real ◽

Artifact Rejection

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Architecture design of an H.264/AVC decoder for real-time FPGA implementation

IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06) ◽

10.1109/asap.2006.17 ◽

2006 ◽

Author(s):

Thomas Warsaw ◽

Marcin Lukowiak

Keyword(s):

Real Time ◽

Fpga Implementation ◽

Architecture Design

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