Architecture design to optimize multipliers in FPGAs based on Maya multiplying method
Keyword(s):
2015 ◽
Vol 10
(7)
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pp. 748
Keyword(s):
2014 ◽
Vol 58
(6)
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pp. 605021-6050210
Keyword(s):
2020 ◽
Vol 9
(1.2)
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pp. 224-229
Keyword(s):
1983 ◽
2015 ◽
Vol null
(47)
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pp. 17-30
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