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Power Constrained and Defect-Probability Driven SoC Test Scheduling with Test Set Partitioning
Proceedings of the Design Automation & Test in Europe Conference
◽
10.1109/date.2006.244141
◽
2006
◽
Cited By ~ 1
Author(s):
Zhiyuan He
◽
Zebo Peng
◽
P. Eles
Keyword(s):
Set Partitioning
◽
Test Scheduling
◽
Test Set
◽
Soc Test
◽
Defect Probability
Download Full-text
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Cited By
References
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
Journal of Electronic Testing
◽
10.1007/s10836-007-5030-6
◽
2008
◽
Vol 24
(1-3)
◽
pp. 247-257
◽
Cited By ~ 16
Author(s):
Zhiyuan He
◽
Zebo Peng
◽
Petru Eles
◽
Paul Rosinger
◽
Bashir M. Al-Hashimi
Keyword(s):
Set Partitioning
◽
Test Scheduling
◽
Test Set
◽
Soc Test
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Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
◽
10.1109/dft.2006.65
◽
2006
◽
Cited By ~ 12
Author(s):
Zhiyuan He
◽
Zebo Peng
◽
Petru Eles
◽
Paul Rosinger
◽
Bashir M. Al-hashimi
Keyword(s):
Set Partitioning
◽
Test Scheduling
◽
Test Set
◽
Soc Test
Download Full-text
SOC Test Scheduling with Test Set Sharing and Broadcasting
14th Asian Test Symposium (ATS'05)
◽
10.1109/ats.2005.100
◽
2005
◽
Cited By ~ 2
Author(s):
A. Larsson
◽
E. Larsson
◽
P. Eles
◽
Zebo Peng
Keyword(s):
Test Scheduling
◽
Test Set
◽
Soc Test
◽
Set Sharing
Download Full-text
Test Set Partitioning in Multilayerd SoCs for Thermal Aware Test Scheduling
2021 International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT)
◽
10.1109/icaect49130.2021.9392413
◽
2021
◽
Author(s):
Indira Rawat
◽
Virendra Singh
Keyword(s):
Set Partitioning
◽
Test Scheduling
◽
Test Set
Download Full-text
SOC test scheduling using simulated annealing
Proceedings. 21st VLSI Test Symposium, 2003.
◽
10.1109/vtest.2003.1197670
◽
2003
◽
Cited By ~ 36
Author(s):
Wei Zou
◽
S.M. Reddy
◽
I. Pomeranz
◽
Yu Huang
Keyword(s):
Simulated Annealing
◽
Test Scheduling
◽
Soc Test
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Static pin mapping and SOC test scheduling for cores with multiple test sets
Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.
◽
10.1109/isqed.2003.1194716
◽
2004
◽
Cited By ~ 13
Author(s):
Yu Huang
◽
Wu-Tung Cheng
◽
Chien-Chung Tsai
◽
N. Mukherjee
◽
S.M. Reddy
Keyword(s):
Test Scheduling
◽
Multiple Test
◽
Soc Test
◽
Test Sets
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Partition Based SoC Test Scheduling with Thermal and Power Constraints under Deep Submicron Technologies
2009 Asian Test Symposium
◽
10.1109/ats.2009.15
◽
2009
◽
Cited By ~ 17
Author(s):
Chunhua Yao
◽
Kewal K. Saluja
◽
Parameswaran Ramanathan
Keyword(s):
Deep Submicron
◽
Test Scheduling
◽
Power Constraints
◽
Soc Test
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Core-based SoC test scheduling using evolutionary algorithm
The 2003 Congress on Evolutionary Computation, 2003. CEC '03.
◽
10.1109/cec.2003.1299880
◽
2004
◽
Author(s):
Yu Xia
◽
M. Chrzanowska-Jeske
◽
Benyi Wang
Keyword(s):
Evolutionary Algorithm
◽
Test Scheduling
◽
Soc Test
Download Full-text
NoC-Based SoC Test Scheduling Using Ant Colony Optimization
ETRI Journal
◽
10.4218/etrij.08.0107.0090
◽
2008
◽
Vol 30
(1)
◽
pp. 129-140
◽
Cited By ~ 6
Author(s):
Jin-Ho Ahn
◽
Sungho Kang
Keyword(s):
Ant Colony Optimization
◽
Ant Colony
◽
Test Scheduling
◽
Soc Test
Download Full-text
An Improved SoC Test Scheduling Method Based on Simulated Annealing Algorithm
Journal of Physics Conference Series
◽
10.1088/1742-6596/806/1/012011
◽
2017
◽
Vol 806
◽
pp. 012011
Author(s):
Jingjing Zheng
◽
Zhihang Shen
◽
Huaien Gao
◽
Bianna Chen
◽
Weida Zheng
◽
...
Keyword(s):
Simulated Annealing
◽
Simulated Annealing Algorithm
◽
Test Scheduling
◽
Soc Test
◽
Scheduling Method
◽
Annealing Algorithm
Download Full-text
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