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Power Attacks Resistance of Cryptographic S-boxes with added Error Detection Circuits
22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)
◽
10.1109/dft.2007.61
◽
2007
◽
Cited By ~ 16
Author(s):
Francesco Regazzoni
◽
Thomas Eisenbarth
◽
Johann Grobschadl
◽
Luca Breveglieri
◽
Paolo Ienne
◽
...
Keyword(s):
Error Detection
◽
Power Attacks
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Error Detection And Correction
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2010
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Concurrent error detection in array dividers by alternating input data
IEE Proceedings E Computers and Digital Techniques
◽
10.1049/ip-e.1992.0019
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1992
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Vol 139
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pp. 123
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Space—time mapping, latency of data flow and concurrent error detection in systolic arrays
IEE Proceedings E Computers and Digital Techniques
◽
10.1049/ip-e.1993.0004
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1993
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Vol 140
(1)
◽
pp. 33
Author(s):
H.F. Li
◽
C.N. Zhang
◽
R. Jayakumar
Keyword(s):
Error Detection
◽
Data Flow
◽
Space Time
◽
Systolic Arrays
◽
Concurrent Error Detection
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Design of Multidirectional Parity Code Using Hamming Code Technique for Error Detection and Correction
PARIPEX-INDIAN JOURNAL OF RESEARCH
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10.15373/22501991/may2014/27
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2012
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Vol 3
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pp. 79-81
Author(s):
Vishal Badole
◽
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Amit Udawat
Keyword(s):
Error Detection
◽
Hamming Code
◽
Code Technique
◽
Error Detection And Correction
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AUTOMATIC-CONTROLLED INFORMATION PROCESSING AND ERROR DETECTION IN A SIMULATED PHARMACY-VERIFICATION TASK
Perceptual and Motor Skills
◽
10.2466/pms.97.5.151-174
◽
2003
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Vol 97
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pp. 151
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SEAN REILLEY
Keyword(s):
Information Processing
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Error Detection
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A method for unsupervised broad-coverage lexical error detection and correction
Proceedings of the Fourth Workshop on Innovative Use of NLP for Building Educational Applications - EdAppsNLP '09
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10.3115/1609843.1609851
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2009
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Real-time error detection techniques based on FPGA
Journal of Computer Applications
◽
10.3724/sp.j.1087.2013.01459
◽
2013
◽
Vol 33
(5)
◽
pp. 1459-1462
Author(s):
Xiaoming JU
◽
Jiehao ZHANG
◽
Yizhong ZHANG
Keyword(s):
Real Time
◽
Error Detection
◽
Time Error
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Wireless Network Design Optimized for Military Operations in Degraded Littoral Environments Using Link Layer Error Detection Mechanisms
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◽
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◽
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◽
Wireless Network
◽
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◽
Link Layer
◽
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◽
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DESIGN FLOW OF CONCURRENT ERROR DETECTION SCHEMES FOR COMBINATIONAL CIRCUITS
Vestnik of Ryazan State Radio Engineering University
◽
10.21667/1995-4565-2018-65-3-92-98
◽
2018
◽
Vol 65
◽
pp. 92-98
Author(s):
A. L. Stempkovskiy
◽
◽
D. V. Telpukhov
◽
A. I. Demeneva
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◽
...
Keyword(s):
Error Detection
◽
Design Flow
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Concurrent Error Detection
◽
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