Performance evaluation of MIC@R router for on-chip networks

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938033 ◽

2009 ◽

Author(s):

Rafik Ben-Tekaya ◽

Adel Baganne ◽

Kholdoun Torki ◽

Rached Tourki

Keyword(s):

Performance Evaluation ◽

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Performance Evaluation of On-chip Interconnect System using Prospective Neural Network Design

2020 IEEE International Students' Conference on Electrical,Electronics and Computer Science (SCEECS) ◽

10.1109/sceecs48394.2020.83 ◽

2020 ◽

Author(s):

Ajita Misra ◽

Diksha Diksha ◽

Yash Agrawal ◽

Vinay Palaparthy

Keyword(s):

Neural Network ◽

Performance Evaluation ◽

Network Design ◽

On Chip ◽

Interconnect System

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A Network on Chip Architecture and Performance Evaluation

2010 Second International Conference on Networks Security, Wireless Communications and Trusted Computing ◽

10.1109/nswctc.2010.91 ◽

2010 ◽

Author(s):

Wang Zhang ◽

Ligang Hou ◽

Lei Zuo ◽

Zhenyu Peng ◽

Wuchen Wu

Keyword(s):

Performance Evaluation ◽

Network On Chip ◽

And Performance ◽

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Performance evaluation of cross link fully adaptive routing algorithm with cross link architecture for Network on Chip

2017 International Conference on Inventive Computing and Informatics (ICICI) ◽

10.1109/icici.2017.8365198 ◽

2017 ◽

Author(s):

Rohit Mahar ◽

Sudhanshu Choudhary

Keyword(s):

Performance Evaluation ◽

Routing Algorithm ◽

Adaptive Routing ◽

Network On Chip ◽

Fully Adaptive ◽

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Floorplan Based Performance Evaluation of 3D Variants of Mesh and BFT Networks-on-Chip

2018 International Conference on Signal Processing and Communications (SPCOM) ◽

10.1109/spcom.2018.8724488 ◽

2018 ◽

Author(s):

Bheemappa Halavar ◽

Basavaraj Talawar

Keyword(s):

Performance Evaluation ◽

Networks On Chip ◽

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Comparative performance evaluation of power and area Network on Chip (NoC) architectures

2012 IEEE International Conference on Computational Intelligence and Computing Research ◽

10.1109/iccic.2012.6510308 ◽

2012 ◽

Author(s):

A. Kalimuthu ◽

M. Karthikeyan

Keyword(s):

Performance Evaluation ◽

Network On Chip ◽

Area Network ◽

Comparative Performance ◽

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Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation

IEEE Transactions on Computers ◽

10.1109/tc.2008.142 ◽

2009 ◽

Vol 58 (1) ◽

pp. 32-45 ◽

Author(s):

Brett Stanley Feero ◽

Partha Pratim Pande

Keyword(s):

Performance Evaluation ◽

Three Dimensional ◽

Networks On Chip ◽

On Chip ◽

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Design and performance evaluation of Mesh-of-Tree-based hierarchical wireless network-on-chip for multicore systems

Journal of Parallel and Distributed Computing ◽

10.1016/j.jpdc.2018.09.008 ◽

2019 ◽

Vol 123 ◽

pp. 100-117 ◽

Author(s):

Abbas Dehghani ◽

Keyvan RahimiZadeh

Keyword(s):

Performance Evaluation ◽

Wireless Network ◽

Network On Chip ◽

Multicore Systems ◽

And Performance ◽

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Performance evaluation of parallel applications on multiprocessor systems on chip

MELECON 2008 - The 14th IEEE Mediterranean Electrotechnical Conference ◽

10.1109/melcon.2008.4618452 ◽

2008 ◽

Author(s):

O. Hammami ◽

G. Tian

Keyword(s):

Performance Evaluation ◽

Parallel Applications ◽

Multiprocessor Systems ◽

Systems On Chip ◽

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Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures (RESEARCH NOTE)

International Journal of Engineering ◽

10.5829/idosi.ije.2014.27.04a.01 ◽

2014 ◽

Vol 27 (4 (A)) ◽

Keyword(s):

Performance Evaluation ◽

Network On Chip ◽

Research Note ◽

Routing Methods ◽

And Performance ◽

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Performance evaluation of single- and multi-hop wireless networks-on-chip with NAS Parallel Benchmarks

Journal of the Brazilian Computer Society ◽

10.1186/s13173-015-0027-y ◽

2015 ◽

Vol 21 (1) ◽

Author(s):

Amanda M.P. Amorim ◽

Poliana A.C. Oliveira ◽

Henrique C. Freitas

Keyword(s):

Wireless Networks ◽

Performance Evaluation ◽

Networks On Chip ◽

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