2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era
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TOTAL DOCUMENTS

79

(FIVE YEARS 0)

H-INDEX

5

(FIVE YEARS 0)

Published By IEEE

9781424443208, 9781424443215

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DfT technique for RF PLLs using built-in monitors

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938057 ◽

2009 ◽

Author(s):

A. Asquini ◽

Ahcene Bounceur ◽

Salvador Mir ◽

Franck Badets ◽

Jean-Louis Carbonero ◽

...

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Performance evaluation of MIC@R router for on-chip networks

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938033 ◽

2009 ◽

Author(s):

Rafik Ben-Tekaya ◽

Adel Baganne ◽

Kholdoun Torki ◽

Rached Tourki

Keyword(s):

Performance Evaluation ◽

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Oxide-trap charge-pumping for radiation reliability issue in MOS devices

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938073 ◽

2009 ◽

Author(s):

Boualem Djezzar ◽

Hakim Tahi ◽

Arezki Mokrani

Keyword(s):

Trap Charge ◽

Charge Pumping ◽

Mos Devices ◽

Reliability Issue

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Special issues and methods for testing LNAs at high frequencies

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938071 ◽

2009 ◽

Author(s):

J. P. Carmo ◽

P. M. Mendes ◽

C. Couto ◽

J. H. Correia

Keyword(s):

High Frequencies

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Design and optimization of c-Silicon solar cell using Process Compact Model (PCM)

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938041 ◽

2009 ◽

Author(s):

T. K. Maiti ◽

C. K. Maiti

Keyword(s):

Silicon Solar Cell ◽

Compact Model ◽

Design And Optimization

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TLM 2.0 simple sockets synthesis to RTL

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938013 ◽

2009 ◽

Author(s):

Nadereh Hatami ◽

Amirali Ghofrani ◽

Paolo Prinetto ◽

Zainalabedin Navabi

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Parallel exact critical path tracing fault simulation with reduced memory requirements

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938046 ◽

2009 ◽

Author(s):

Sergei Devadze ◽

Raimund Ubar ◽

Jaan Raik ◽

Artur Jutman

Keyword(s):

Critical Path ◽

Fault Simulation ◽

Path Tracing ◽

Critical Path Tracing

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Infrastructures for education and research

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938008 ◽

2009 ◽

Author(s):

B. Courtois

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A reliability-aware design methodology for Networks-on-Chip applications

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938035 ◽

2009 ◽

Author(s):

Haytham Elmiligi ◽

Ahmed A. Morgan ◽

M. Watheq El-Kharashi ◽

Fayez Gebalis

Keyword(s):

Design Methodology ◽

Networks On Chip ◽

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Session 5.A: Des for testability

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era ◽

10.1109/dtis.2009.4938054 ◽

2009 ◽

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