Accelerating Fixed-Point Simulations Using Width Reconfigurable Hardware Architectures

Author(s):  
Keyvan Shahin ◽  
Michael Huebner
Author(s):  
Alexey V. Sokolovskiy ◽  
Evgeny A. Veisov ◽  
Valery N. Tyapkin ◽  
Dmitry D. Dmitriev

The fixed-point hardware architecture of the QR decomposition is constrained by a several issues that leads to decrease of a compute accuracy depending on a matrix size. In this article described the hardware architectures based on CORDIC algorithm and approximation functions. As a basis technique is used a Givens rotation technique, because it is a most suitable technique for hardware implementation


2003 ◽  
Author(s):  
Robin R. Vallacher ◽  
Andrzej Nowak ◽  
Matthew Rockloff
Keyword(s):  

Sign in / Sign up

Export Citation Format

Share Document