IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
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76

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Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Design and Implementation of FPGA Router for Efficient Utilization of Heterogeneous Routing Resources

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.26 ◽

2005 ◽

Author(s):

D. Rautela ◽

R. Katti

Keyword(s):

Efficient Utilization ◽

Design And Implementation

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409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.2 ◽

2005 ◽

Author(s):

Sheng Sun ◽

Yi Han ◽

Xinyu Guo ◽

Kian Haur Chong ◽

L. McMurchie ◽

...

Keyword(s):

Prediction Logic ◽

Output Prediction Logic

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Sensing Design Issues in Deep Submicron CMOS SRAMs

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.67 ◽

2005 ◽

Author(s):

A. Natarajan ◽

V. Shankar ◽

A. Maheshwari ◽

W. Burleson

Keyword(s):

Deep Submicron ◽

Design Issues ◽

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eWatch: Context Sensitive System Design Case Study

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.31 ◽

2005 ◽

Author(s):

A. Smailagic ◽

D.P. Siewiorek ◽

U. Maurer ◽

A. Rowe ◽

K.P. Tang

Keyword(s):

System Design ◽

Context Sensitive ◽

Design Case ◽

Design Case Study

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Increasing Data TLB Resilience to Transient Errors

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.43 ◽

2005 ◽

Author(s):

Feihui Li ◽

M. Kandemir

Keyword(s):

Transient Errors

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On Reducing Peak Current and Power during Test

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.53 ◽

2005 ◽

Author(s):

Wei Li ◽

S.M. Reddy ◽

I. Pomeranz

Keyword(s):

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System Level Methodology for Programming CMP Based Multi-Threaded Network Processor Architectures

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.71 ◽

2005 ◽

Author(s):

V. Ramamurthi ◽

J. McCollum ◽

C. Ostler ◽

K.S. Chatha

Keyword(s):

Network Processor ◽

System Level ◽

Processor Architectures

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Towards Integration of Quadratic Placement and Pin Assignment

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.73 ◽

2005 ◽

Author(s):

J. Westra ◽

P. Groeneveld

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Two-Phase Resonant Clock Distribution

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.74 ◽

2005 ◽

Author(s):

J.-Y. Chueh ◽

M.C. Papaefthymiou ◽

C.H. Ziesler

Keyword(s):

Clock Distribution ◽

Two Phase ◽

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A High Performance Hybrid Wave-Pipelined Multiplier

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.7 ◽

2005 ◽

Author(s):

S.B. Tatapudi ◽

J.G. Delgado-Frias

Keyword(s):

High Performance ◽

Hybrid Wave ◽

Pipelined Multiplier

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