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FPGA-based fine grain processor array design considerations
Proceedings of Third International Conference on Electronics, Circuits, and Systems
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10.1109/icecs.1996.584448
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2002
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Author(s):
I. Erenyi
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I. Vassanyi
Keyword(s):
Processor Array
◽
Array Design
◽
Design Considerations
◽
Fine Grain
Download Full-text
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Array-design considerations for the Solar Probe Plus mission
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Array design considerations for exploitation of stable weakly dispersive modal pulses in the deep ocean
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Keyword(s):
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Array Design
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On space plasma ground test methodologies and related solar array design considerations
2009 34th IEEE Photovoltaic Specialists Conference (PVSC)
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10.1109/pvsc.2009.5411311
◽
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Author(s):
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◽
Alexander L. Bogorad
◽
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◽
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Keyword(s):
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Solar Array
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Array Design
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A penetrating, cortical electrode array: design considerations
1990 IEEE International Conference on Systems, Man, and Cybernetics Conference Proceedings
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10.1109/icsmc.1990.142258
◽
2002
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Author(s):
R.A. Normann
Keyword(s):
Electrode Array
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Array Design
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Design Considerations
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Processor array design for deep packet classification
Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, 2004.
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10.1109/isspit.2004.1433693
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2005
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Author(s):
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◽
F. Gebali
Keyword(s):
Packet Classification
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Processor Array
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Array Design
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Processor Array Design with the Use of Genetic Algorithm
Large-Scale Scientific Computing - Lecture Notes in Computer Science
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10.1007/978-3-642-29843-1_27
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Piotr Ratuszniak
Keyword(s):
Genetic Algorithm
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Processor Array
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Array Design
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Short-Lag Spatial Coherence Imaging in 1.5-D and 1.75-D Arrays: Elevation Performance and Array Design Considerations
IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control
◽
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◽
2019
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pp. 1047-1056
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Cited By ~ 2
Author(s):
Matthew R. Morgan
◽
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◽
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Keyword(s):
Spatial Coherence
◽
Array Design
◽
Design Considerations
◽
Coherence Imaging
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Low-Power Processor Array Design Strategy for Solving Computationally Intensive 2D Topographic Problems
Cellular Nanoscale Sensory Wave Computing
◽
10.1007/978-1-4419-1011-0_10
◽
2009
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pp. 215-245
Author(s):
Ákos Zarándy
◽
Csaba Rekeczky
Keyword(s):
Low Power
◽
Design Strategy
◽
Processor Array
◽
Array Design
◽
Computationally Intensive
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Optimizing general design objectives in processor-array design
Proceedings of 8th International Parallel Processing Symposium
◽
10.1109/ipps.1994.288286
◽
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Cited By ~ 2
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◽
B.W. Wah
Keyword(s):
Processor Array
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Array Design
◽
General Design
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