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Use of multiple numeration systems for architecture and design of a high performance FIR filter netlist generator
Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004.
◽
10.1109/icm.2004.1434721
◽
2005
◽
Cited By ~ 2
Author(s):
L. Noury
◽
H. Mehrez
◽
F. Durbin
◽
A. Tissot
Keyword(s):
High Performance
◽
Fir Filter
◽
Numeration Systems
◽
Architecture And Design
Download Full-text
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References
High-performance FIR filter design based on sharing multiplication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
◽
10.1109/tvlsi.2002.800529
◽
2003
◽
Vol 11
(2)
◽
pp. 244-253
◽
Cited By ~ 15
Author(s):
Jongsun Park
◽
K. Muhammad
◽
K. Roy
Keyword(s):
High Performance
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Filter Design
◽
Fir Filter
◽
Fir Filter Design
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Energy Efficient and High–Performance FIR Filter Design on Spartan–6 FPGA
3C Tecnología_Glosas de innovación aplicadas a la pyme
◽
10.17993/3ctecno.2019.specialissue2.36-49
◽
2019
◽
pp. 36-49
Author(s):
Bishwajeet Pandey
◽
Abhishek Jain
◽
Abhishek Kumar
◽
Pervesh Kumar
◽
Akbar Hussain
◽
...
Keyword(s):
Energy Efficient
◽
High Performance
◽
Filter Design
◽
Fir Filter
◽
Fir Filter Design
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High Performance VLSI Architecture for Transpose Form FIR Filter using Integrated Module
2018 International Conference on Computer Communication and Informatics (ICCCI)
◽
10.1109/iccci.2018.8441478
◽
2018
◽
Author(s):
Ankit Upadhyay
◽
Uday Panwar
Keyword(s):
High Performance
◽
Vlsi Architecture
◽
Fir Filter
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Architecture and design of a high performance SRAM for SOC design
Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design
◽
10.1109/aspdac.2002.994961
◽
2003
◽
Cited By ~ 2
Author(s):
S. Singh
◽
S. Azmi
◽
N. Agrawal
◽
P. Phani
◽
A. Rout
Keyword(s):
High Performance
◽
Architecture And Design
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High performance VHDL FIR filter structure for symbol timing system implemented on FPGA
2014 22nd Telecommunications Forum Telfor (TELFOR)
◽
10.1109/telfor.2014.7034450
◽
2014
◽
Author(s):
Pavel Fiala
◽
Richard Linhart
Keyword(s):
High Performance
◽
Fir Filter
◽
Symbol Timing
◽
Filter Structure
◽
Timing System
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“High performance fir filter for fixed and reconfigurable applications”
10.46625/ijfrd.2020.1202
◽
2020
◽
Vol 01
(02)
◽
pp. 10-20
Author(s):
Kiran Kotin
◽
Karemma Myaginamani
◽
Pratibha V Hiremath Urf Hosalli
◽
Soumya Shirol
◽
Sudha Betageri
Keyword(s):
High Performance
◽
Fir Filter
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VLSI architecture and design for high performance adaptive video scaling
ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)
◽
10.1109/iscas.1999.780028
◽
1999
◽
Cited By ~ 1
Author(s):
Arun Raghupathy
◽
Pohsiang Hsu
◽
K.J. Ray Liu
◽
Nitin Chandrachoodan
Keyword(s):
High Performance
◽
Vlsi Architecture
◽
Adaptive Video
◽
Architecture And Design
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MMR: a high-performance MultiMedia Router-architecture and design trade-offs
Proceedings Fifth International Symposium on High-Performance Computer Architecture
◽
10.1109/hpca.1999.744383
◽
1999
◽
Cited By ~ 45
Author(s):
J. Duato
◽
S. Yalamanchili
◽
M.B. Caminero
◽
D. Love
◽
F.J. Quiles
Keyword(s):
High Performance
◽
Router Architecture
◽
Trade Offs
◽
Architecture And Design
Download Full-text
Discrete-time repetitive control with model-less FIR filter inversion for high performance nanopositioning
2014 IEEE/ASME International Conference on Advanced Intelligent Mechatronics
◽
10.1109/aim.2014.6878323
◽
2014
◽
Cited By ~ 8
Author(s):
Yik R. Teo
◽
Arnfinn A. Eielsen
◽
J. Tommy Gravdahl
◽
Andrew J. Fleming
Keyword(s):
Discrete Time
◽
High Performance
◽
Repetitive Control
◽
Fir Filter
Download Full-text
FIR filter implementation for high-performance application in a high-end FPGA
Telfor Journal
◽
10.5937/telfor1901041p
◽
2019
◽
Vol 11
(1)
◽
pp. 41-45
Author(s):
Stefan Pijetlović
◽
Miloš Subotić
◽
Vladimir Marinković
◽
Nebojša Pjevalica
Keyword(s):
High Performance
◽
Fir Filter
◽
High Performance Application
Download Full-text
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