An implantable VLSI architecture for real time spike sorting in cortically controlled Brain Machine Interfaces

2010 ◽  
Author(s):  
Mehdi Aghagolzadeh ◽  
Fei Zhang ◽  
Karim Oweiss
Keyword(s):  
Real Time ◽  
Vlsi Architecture ◽  
Spike Sorting ◽  
Brain Machine Interfaces

scholarly journals Towards Real-Time Distributed Signal Modeling for Brain-Machine Interfaces

2007 ◽  
pp. 964-971 ◽  
Author(s):  
Jack DiGiovanna ◽  
Loris Marchal ◽  
Prapaporn Rattanatamrong ◽  
Ming Zhao ◽  
Shalom Darmanjian ◽  
...  
Keyword(s):  
Real Time ◽  
Signal Modeling ◽  
Brain Machine Interfaces

An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With $0.175~\mu$ W/Channel in 65-nm CMOS

2019 ◽  
Vol 27 (1) ◽  
pp. 126-137 ◽  
Author(s):  
Anh Tuan Do ◽  
Seyed Mohammad Ali Zeinolabedin ◽  
Dongsuk Jeon ◽  
Dennis Sylvester ◽  
Tony Tae-Hyoung Kim
Keyword(s):  
Real Time ◽  
Neural Recording ◽  
Spike Sorting ◽  
Area Efficient

A Novel VLSI Architecture for Real-Time Line-Based Wavelet Transform Using Lifting Scheme

2007 ◽  
Vol 22 (5) ◽  
pp. 661-672 ◽  
Author(s):  
Kai Liu ◽  
Ke-Yan Wang ◽  
Yun-Song Li ◽  
Cheng-Ke Wu
Keyword(s):  
Wavelet Transform ◽  
Real Time ◽  
Vlsi Architecture ◽  
Lifting Scheme ◽  
Time Line

Real-Time Access to Attention and Attention-Based Brain-Machine Interfaces

2021 ◽  
pp. 545-549
Author(s):  
C. Gaillard ◽  
C. De Sousa ◽  
J. Amengual ◽  
S. Ben Hamed
Keyword(s):  
Real Time ◽  
Brain Machine Interfaces

scholarly journals Compact standalone platform for neural recording with real-time spike sorting and data logging

2018 ◽  
Vol 15 (4) ◽  
pp. 046014 ◽  
Author(s):  
Song Luan ◽  
Ian Williams ◽  
Michal Maslik ◽  
Yan Liu ◽  
Felipe De Carvalho ◽  
...  
Keyword(s):  
Real Time ◽  
Neural Recording ◽  
Spike Sorting ◽  
Data Logging
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